
read-primitive-measurement:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400d38 <_init>:
  400d38:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400d3c:	910003fd 	mov	x29, sp
  400d40:	940000ae 	bl	400ff8 <call_weak_fn>
  400d44:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400d48:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400d50 <.plt>:
  400d50:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400d54:	f0000090 	adrp	x16, 413000 <__FRAME_END__+0xf270>
  400d58:	f947fe11 	ldr	x17, [x16, #4088]
  400d5c:	913fe210 	add	x16, x16, #0xff8
  400d60:	d61f0220 	br	x17
  400d64:	d503201f 	nop
  400d68:	d503201f 	nop
  400d6c:	d503201f 	nop

0000000000400d70 <memcpy@plt>:
  400d70:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400d74:	f9400211 	ldr	x17, [x16]
  400d78:	91000210 	add	x16, x16, #0x0
  400d7c:	d61f0220 	br	x17

0000000000400d80 <tcflush@plt>:
  400d80:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400d84:	f9400611 	ldr	x17, [x16, #8]
  400d88:	91002210 	add	x16, x16, #0x8
  400d8c:	d61f0220 	br	x17

0000000000400d90 <strlen@plt>:
  400d90:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400d94:	f9400a11 	ldr	x17, [x16, #16]
  400d98:	91004210 	add	x16, x16, #0x10
  400d9c:	d61f0220 	br	x17

0000000000400da0 <exit@plt>:
  400da0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400da4:	f9400e11 	ldr	x17, [x16, #24]
  400da8:	91006210 	add	x16, x16, #0x18
  400dac:	d61f0220 	br	x17

0000000000400db0 <perror@plt>:
  400db0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400db4:	f9401211 	ldr	x17, [x16, #32]
  400db8:	91008210 	add	x16, x16, #0x20
  400dbc:	d61f0220 	br	x17

0000000000400dc0 <sprintf@plt>:
  400dc0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400dc4:	f9401611 	ldr	x17, [x16, #40]
  400dc8:	9100a210 	add	x16, x16, #0x28
  400dcc:	d61f0220 	br	x17

0000000000400dd0 <pthread_attr_init@plt>:
  400dd0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400dd4:	f9401a11 	ldr	x17, [x16, #48]
  400dd8:	9100c210 	add	x16, x16, #0x30
  400ddc:	d61f0220 	br	x17

0000000000400de0 <cfsetospeed@plt>:
  400de0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400de4:	f9401e11 	ldr	x17, [x16, #56]
  400de8:	9100e210 	add	x16, x16, #0x38
  400dec:	d61f0220 	br	x17

0000000000400df0 <tcgetattr@plt>:
  400df0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400df4:	f9402211 	ldr	x17, [x16, #64]
  400df8:	91010210 	add	x16, x16, #0x40
  400dfc:	d61f0220 	br	x17

0000000000400e00 <atoi@plt>:
  400e00:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e04:	f9402611 	ldr	x17, [x16, #72]
  400e08:	91012210 	add	x16, x16, #0x48
  400e0c:	d61f0220 	br	x17

0000000000400e10 <getpid@plt>:
  400e10:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e14:	f9402a11 	ldr	x17, [x16, #80]
  400e18:	91014210 	add	x16, x16, #0x50
  400e1c:	d61f0220 	br	x17

0000000000400e20 <open@plt>:
  400e20:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e24:	f9402e11 	ldr	x17, [x16, #88]
  400e28:	91016210 	add	x16, x16, #0x58
  400e2c:	d61f0220 	br	x17

0000000000400e30 <__libc_start_main@plt>:
  400e30:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e34:	f9403211 	ldr	x17, [x16, #96]
  400e38:	91018210 	add	x16, x16, #0x60
  400e3c:	d61f0220 	br	x17

0000000000400e40 <memset@plt>:
  400e40:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e44:	f9403611 	ldr	x17, [x16, #104]
  400e48:	9101a210 	add	x16, x16, #0x68
  400e4c:	d61f0220 	br	x17

0000000000400e50 <getopt@plt>:
  400e50:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e54:	f9403a11 	ldr	x17, [x16, #112]
  400e58:	9101c210 	add	x16, x16, #0x70
  400e5c:	d61f0220 	br	x17

0000000000400e60 <close@plt>:
  400e60:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e64:	f9403e11 	ldr	x17, [x16, #120]
  400e68:	9101e210 	add	x16, x16, #0x78
  400e6c:	d61f0220 	br	x17

0000000000400e70 <atol@plt>:
  400e70:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e74:	f9404211 	ldr	x17, [x16, #128]
  400e78:	91020210 	add	x16, x16, #0x80
  400e7c:	d61f0220 	br	x17

0000000000400e80 <pthread_create@plt>:
  400e80:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e84:	f9404611 	ldr	x17, [x16, #136]
  400e88:	91022210 	add	x16, x16, #0x88
  400e8c:	d61f0220 	br	x17

0000000000400e90 <__gmon_start__@plt>:
  400e90:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400e94:	f9404a11 	ldr	x17, [x16, #144]
  400e98:	91024210 	add	x16, x16, #0x90
  400e9c:	d61f0220 	br	x17

0000000000400ea0 <write@plt>:
  400ea0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400ea4:	f9404e11 	ldr	x17, [x16, #152]
  400ea8:	91026210 	add	x16, x16, #0x98
  400eac:	d61f0220 	br	x17

0000000000400eb0 <pthread_join@plt>:
  400eb0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400eb4:	f9405211 	ldr	x17, [x16, #160]
  400eb8:	91028210 	add	x16, x16, #0xa0
  400ebc:	d61f0220 	br	x17

0000000000400ec0 <abort@plt>:
  400ec0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400ec4:	f9405611 	ldr	x17, [x16, #168]
  400ec8:	9102a210 	add	x16, x16, #0xa8
  400ecc:	d61f0220 	br	x17

0000000000400ed0 <pthread_exit@plt>:
  400ed0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400ed4:	f9405a11 	ldr	x17, [x16, #176]
  400ed8:	9102c210 	add	x16, x16, #0xb0
  400edc:	d61f0220 	br	x17

0000000000400ee0 <puts@plt>:
  400ee0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400ee4:	f9405e11 	ldr	x17, [x16, #184]
  400ee8:	9102e210 	add	x16, x16, #0xb8
  400eec:	d61f0220 	br	x17

0000000000400ef0 <fcntl@plt>:
  400ef0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400ef4:	f9406211 	ldr	x17, [x16, #192]
  400ef8:	91030210 	add	x16, x16, #0xc0
  400efc:	d61f0220 	br	x17

0000000000400f00 <read@plt>:
  400f00:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f04:	f9406611 	ldr	x17, [x16, #200]
  400f08:	91032210 	add	x16, x16, #0xc8
  400f0c:	d61f0220 	br	x17

0000000000400f10 <tcsetattr@plt>:
  400f10:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f14:	f9406a11 	ldr	x17, [x16, #208]
  400f18:	91034210 	add	x16, x16, #0xd0
  400f1c:	d61f0220 	br	x17

0000000000400f20 <isatty@plt>:
  400f20:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f24:	f9406e11 	ldr	x17, [x16, #216]
  400f28:	91036210 	add	x16, x16, #0xd8
  400f2c:	d61f0220 	br	x17

0000000000400f30 <cfmakeraw@plt>:
  400f30:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f34:	f9407211 	ldr	x17, [x16, #224]
  400f38:	91038210 	add	x16, x16, #0xe0
  400f3c:	d61f0220 	br	x17

0000000000400f40 <usleep@plt>:
  400f40:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f44:	f9407611 	ldr	x17, [x16, #232]
  400f48:	9103a210 	add	x16, x16, #0xe8
  400f4c:	d61f0220 	br	x17

0000000000400f50 <cfsetispeed@plt>:
  400f50:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f54:	f9407a11 	ldr	x17, [x16, #240]
  400f58:	9103c210 	add	x16, x16, #0xf0
  400f5c:	d61f0220 	br	x17

0000000000400f60 <strncpy@plt>:
  400f60:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f64:	f9407e11 	ldr	x17, [x16, #248]
  400f68:	9103e210 	add	x16, x16, #0xf8
  400f6c:	d61f0220 	br	x17

0000000000400f70 <printf@plt>:
  400f70:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f74:	f9408211 	ldr	x17, [x16, #256]
  400f78:	91040210 	add	x16, x16, #0x100
  400f7c:	d61f0220 	br	x17

0000000000400f80 <__assert_fail@plt>:
  400f80:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f84:	f9408611 	ldr	x17, [x16, #264]
  400f88:	91042210 	add	x16, x16, #0x108
  400f8c:	d61f0220 	br	x17

0000000000400f90 <__errno_location@plt>:
  400f90:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400f94:	f9408a11 	ldr	x17, [x16, #272]
  400f98:	91044210 	add	x16, x16, #0x110
  400f9c:	d61f0220 	br	x17

0000000000400fa0 <putchar@plt>:
  400fa0:	900000b0 	adrp	x16, 414000 <memcpy@GLIBC_2.17>
  400fa4:	f9408e11 	ldr	x17, [x16, #280]
  400fa8:	91046210 	add	x16, x16, #0x118
  400fac:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400fb0 <_start>:
  400fb0:	d280001d 	mov	x29, #0x0                   	// #0
  400fb4:	d280001e 	mov	x30, #0x0                   	// #0
  400fb8:	aa0003e5 	mov	x5, x0
  400fbc:	f94003e1 	ldr	x1, [sp]
  400fc0:	910023e2 	add	x2, sp, #0x8
  400fc4:	910003e6 	mov	x6, sp
  400fc8:	580000c0 	ldr	x0, 400fe0 <_start+0x30>
  400fcc:	580000e3 	ldr	x3, 400fe8 <_start+0x38>
  400fd0:	58000104 	ldr	x4, 400ff0 <_start+0x40>
  400fd4:	97ffff97 	bl	400e30 <__libc_start_main@plt>
  400fd8:	97ffffba 	bl	400ec0 <abort@plt>
  400fdc:	00000000 	.inst	0x00000000 ; undefined
  400fe0:	004015d0 	.word	0x004015d0
  400fe4:	00000000 	.word	0x00000000
  400fe8:	004032e0 	.word	0x004032e0
  400fec:	00000000 	.word	0x00000000
  400ff0:	00403360 	.word	0x00403360
  400ff4:	00000000 	.word	0x00000000

0000000000400ff8 <call_weak_fn>:
  400ff8:	f0000080 	adrp	x0, 413000 <__FRAME_END__+0xf270>
  400ffc:	f947f000 	ldr	x0, [x0, #4064]
  401000:	b4000040 	cbz	x0, 401008 <call_weak_fn+0x10>
  401004:	17ffffa3 	b	400e90 <__gmon_start__@plt>
  401008:	d65f03c0 	ret
  40100c:	00000000 	.inst	0x00000000 ; undefined

0000000000401010 <deregister_tm_clones>:
  401010:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401014:	9114c000 	add	x0, x0, #0x530
  401018:	f0000081 	adrp	x1, 414000 <memcpy@GLIBC_2.17>
  40101c:	9114c021 	add	x1, x1, #0x530
  401020:	eb00003f 	cmp	x1, x0
  401024:	540000a0 	b.eq	401038 <deregister_tm_clones+0x28>  // b.none
  401028:	d0000001 	adrp	x1, 403000 <char_to_hex+0x90>
  40102c:	f941c021 	ldr	x1, [x1, #896]
  401030:	b4000041 	cbz	x1, 401038 <deregister_tm_clones+0x28>
  401034:	d61f0020 	br	x1
  401038:	d65f03c0 	ret
  40103c:	d503201f 	nop

0000000000401040 <register_tm_clones>:
  401040:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401044:	9114c000 	add	x0, x0, #0x530
  401048:	f0000081 	adrp	x1, 414000 <memcpy@GLIBC_2.17>
  40104c:	9114c021 	add	x1, x1, #0x530
  401050:	cb000021 	sub	x1, x1, x0
  401054:	9343fc21 	asr	x1, x1, #3
  401058:	8b41fc21 	add	x1, x1, x1, lsr #63
  40105c:	9341fc21 	asr	x1, x1, #1
  401060:	b40000a1 	cbz	x1, 401074 <register_tm_clones+0x34>
  401064:	d0000002 	adrp	x2, 403000 <char_to_hex+0x90>
  401068:	f941c442 	ldr	x2, [x2, #904]
  40106c:	b4000042 	cbz	x2, 401074 <register_tm_clones+0x34>
  401070:	d61f0040 	br	x2
  401074:	d65f03c0 	ret

0000000000401078 <__do_global_dtors_aux>:
  401078:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40107c:	910003fd 	mov	x29, sp
  401080:	f9000bf3 	str	x19, [sp, #16]
  401084:	f0000093 	adrp	x19, 414000 <memcpy@GLIBC_2.17>
  401088:	3954e260 	ldrb	w0, [x19, #1336]
  40108c:	35000080 	cbnz	w0, 40109c <__do_global_dtors_aux+0x24>
  401090:	97ffffe0 	bl	401010 <deregister_tm_clones>
  401094:	52800020 	mov	w0, #0x1                   	// #1
  401098:	3914e260 	strb	w0, [x19, #1336]
  40109c:	f9400bf3 	ldr	x19, [sp, #16]
  4010a0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4010a4:	d65f03c0 	ret

00000000004010a8 <frame_dummy>:
  4010a8:	17ffffe6 	b	401040 <register_tm_clones>

00000000004010ac <printhelp>:
  4010ac:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4010b0:	910003fd 	mov	x29, sp
  4010b4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4010b8:	910e4000 	add	x0, x0, #0x390
  4010bc:	97ffff89 	bl	400ee0 <puts@plt>
  4010c0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4010c4:	910f0000 	add	x0, x0, #0x3c0
  4010c8:	97ffff86 	bl	400ee0 <puts@plt>
  4010cc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4010d0:	910f4000 	add	x0, x0, #0x3d0
  4010d4:	97ffff83 	bl	400ee0 <puts@plt>
  4010d8:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4010dc:	91100000 	add	x0, x0, #0x400
  4010e0:	97ffff80 	bl	400ee0 <puts@plt>
  4010e4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4010e8:	9110a000 	add	x0, x0, #0x428
  4010ec:	97ffff7d 	bl	400ee0 <puts@plt>
  4010f0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4010f4:	91116000 	add	x0, x0, #0x458
  4010f8:	97ffff7a 	bl	400ee0 <puts@plt>
  4010fc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401100:	91124000 	add	x0, x0, #0x490
  401104:	97ffff77 	bl	400ee0 <puts@plt>
  401108:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40110c:	91134000 	add	x0, x0, #0x4d0
  401110:	97ffff74 	bl	400ee0 <puts@plt>
  401114:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401118:	9113a000 	add	x0, x0, #0x4e8
  40111c:	97ffff71 	bl	400ee0 <puts@plt>
  401120:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401124:	9113e000 	add	x0, x0, #0x4f8
  401128:	97ffff6e 	bl	400ee0 <puts@plt>
  40112c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401130:	91144000 	add	x0, x0, #0x510
  401134:	97ffff6b 	bl	400ee0 <puts@plt>
  401138:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40113c:	91148000 	add	x0, x0, #0x520
  401140:	97ffff68 	bl	400ee0 <puts@plt>
  401144:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401148:	9114e000 	add	x0, x0, #0x538
  40114c:	97ffff65 	bl	400ee0 <puts@plt>
  401150:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401154:	91152000 	add	x0, x0, #0x548
  401158:	97ffff62 	bl	400ee0 <puts@plt>
  40115c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401160:	91158000 	add	x0, x0, #0x560
  401164:	97ffff5f 	bl	400ee0 <puts@plt>
  401168:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40116c:	91162000 	add	x0, x0, #0x588
  401170:	97ffff5c 	bl	400ee0 <puts@plt>
  401174:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401178:	9116c000 	add	x0, x0, #0x5b0
  40117c:	97ffff59 	bl	400ee0 <puts@plt>
  401180:	d503201f 	nop
  401184:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401188:	d65f03c0 	ret

000000000040118c <progarm_para>:
  40118c:	a9b97bfd 	stp	x29, x30, [sp, #-112]!
  401190:	910003fd 	mov	x29, sp
  401194:	f9000bf3 	str	x19, [sp, #16]
  401198:	b9004fa0 	str	w0, [x29, #76]
  40119c:	f90023a1 	str	x1, [x29, #64]
  4011a0:	f9001fa2 	str	x2, [x29, #56]
  4011a4:	f9001ba3 	str	x3, [x29, #48]
  4011a8:	f90017a4 	str	x4, [x29, #40]
  4011ac:	12800000 	mov	w0, #0xffffffff            	// #-1
  4011b0:	b9006fa0 	str	w0, [x29, #108]
  4011b4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4011b8:	91176000 	add	x0, x0, #0x5d8
  4011bc:	f90033a0 	str	x0, [x29, #96]
  4011c0:	140000f8 	b	4015a0 <progarm_para+0x414>
  4011c4:	b9405fa0 	ldr	w0, [x29, #92]
  4011c8:	71018c1f 	cmp	w0, #0x63
  4011cc:	54000b40 	b.eq	401334 <progarm_para+0x1a8>  // b.none
  4011d0:	71018c1f 	cmp	w0, #0x63
  4011d4:	5400010c 	b.gt	4011f4 <progarm_para+0x68>
  4011d8:	7101841f 	cmp	w0, #0x61
  4011dc:	54000240 	b.eq	401224 <progarm_para+0x98>  // b.none
  4011e0:	7101841f 	cmp	w0, #0x61
  4011e4:	540006ac 	b.gt	4012b8 <progarm_para+0x12c>
  4011e8:	7101101f 	cmp	w0, #0x44
  4011ec:	54000f60 	b.eq	4013d8 <progarm_para+0x24c>  // b.none
  4011f0:	140000ec 	b	4015a0 <progarm_para+0x414>
  4011f4:	7101a01f 	cmp	w0, #0x68
  4011f8:	54001ce0 	b.eq	401594 <progarm_para+0x408>  // b.none
  4011fc:	7101a01f 	cmp	w0, #0x68
  401200:	5400008c 	b.gt	401210 <progarm_para+0x84>
  401204:	7101901f 	cmp	w0, #0x64
  401208:	54000e00 	b.eq	4013c8 <progarm_para+0x23c>  // b.none
  40120c:	140000e5 	b	4015a0 <progarm_para+0x414>
  401210:	7101cc1f 	cmp	w0, #0x73
  401214:	54001440 	b.eq	40149c <progarm_para+0x310>  // b.none
  401218:	7101d01f 	cmp	w0, #0x74
  40121c:	540017e0 	b.eq	401518 <progarm_para+0x38c>  // b.none
  401220:	140000e0 	b	4015a0 <progarm_para+0x414>
  401224:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401228:	9114c000 	add	x0, x0, #0x530
  40122c:	f9400013 	ldr	x19, [x0]
  401230:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401234:	9114c000 	add	x0, x0, #0x530
  401238:	f9400000 	ldr	x0, [x0]
  40123c:	97fffed5 	bl	400d90 <strlen@plt>
  401240:	aa0003e1 	mov	x1, x0
  401244:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401248:	9125c000 	add	x0, x0, #0x970
  40124c:	aa0103e2 	mov	x2, x1
  401250:	aa1303e1 	mov	x1, x19
  401254:	97ffff43 	bl	400f60 <strncpy@plt>
  401258:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40125c:	9114f000 	add	x0, x0, #0x53c
  401260:	b9400000 	ldr	w0, [x0]
  401264:	7100101f 	cmp	w0, #0x4
  401268:	540019cd 	b.le	4015a0 <progarm_para+0x414>
  40126c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401270:	911c0002 	add	x2, x0, #0x700
  401274:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401278:	9117a001 	add	x1, x0, #0x5e8
  40127c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401280:	9117c000 	add	x0, x0, #0x5f0
  401284:	52800604 	mov	w4, #0x30                  	// #48
  401288:	aa0203e3 	mov	x3, x2
  40128c:	aa0103e2 	mov	x2, x1
  401290:	528000a1 	mov	w1, #0x5                   	// #5
  401294:	97ffff37 	bl	400f70 <printf@plt>
  401298:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40129c:	9125c001 	add	x1, x0, #0x970
  4012a0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4012a4:	9118a000 	add	x0, x0, #0x628
  4012a8:	97ffff32 	bl	400f70 <printf@plt>
  4012ac:	52800140 	mov	w0, #0xa                   	// #10
  4012b0:	97ffff3c 	bl	400fa0 <putchar@plt>
  4012b4:	140000bb 	b	4015a0 <progarm_para+0x414>
  4012b8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4012bc:	9114c000 	add	x0, x0, #0x530
  4012c0:	f9400000 	ldr	x0, [x0]
  4012c4:	97fffeeb 	bl	400e70 <atol@plt>
  4012c8:	aa0003e1 	mov	x1, x0
  4012cc:	f94017a0 	ldr	x0, [x29, #40]
  4012d0:	f9000001 	str	x1, [x0]
  4012d4:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4012d8:	9114f000 	add	x0, x0, #0x53c
  4012dc:	b9400000 	ldr	w0, [x0]
  4012e0:	7100101f 	cmp	w0, #0x4
  4012e4:	540015ed 	b.le	4015a0 <progarm_para+0x414>
  4012e8:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4012ec:	911c0002 	add	x2, x0, #0x700
  4012f0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4012f4:	9117a001 	add	x1, x0, #0x5e8
  4012f8:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4012fc:	9117c000 	add	x0, x0, #0x5f0
  401300:	528006c4 	mov	w4, #0x36                  	// #54
  401304:	aa0203e3 	mov	x3, x2
  401308:	aa0103e2 	mov	x2, x1
  40130c:	528000a1 	mov	w1, #0x5                   	// #5
  401310:	97ffff18 	bl	400f70 <printf@plt>
  401314:	f94017a0 	ldr	x0, [x29, #40]
  401318:	f9400001 	ldr	x1, [x0]
  40131c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401320:	9118e000 	add	x0, x0, #0x638
  401324:	97ffff13 	bl	400f70 <printf@plt>
  401328:	52800140 	mov	w0, #0xa                   	// #10
  40132c:	97ffff1d 	bl	400fa0 <putchar@plt>
  401330:	1400009c 	b	4015a0 <progarm_para+0x414>
  401334:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401338:	9114c000 	add	x0, x0, #0x530
  40133c:	f9400013 	ldr	x19, [x0]
  401340:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401344:	9114c000 	add	x0, x0, #0x530
  401348:	f9400000 	ldr	x0, [x0]
  40134c:	97fffe91 	bl	400d90 <strlen@plt>
  401350:	aa0003e1 	mov	x1, x0
  401354:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401358:	91254000 	add	x0, x0, #0x950
  40135c:	aa0103e2 	mov	x2, x1
  401360:	aa1303e1 	mov	x1, x19
  401364:	97fffeff 	bl	400f60 <strncpy@plt>
  401368:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40136c:	9114f000 	add	x0, x0, #0x53c
  401370:	b9400000 	ldr	w0, [x0]
  401374:	7100101f 	cmp	w0, #0x4
  401378:	5400114d 	b.le	4015a0 <progarm_para+0x414>
  40137c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401380:	911c0002 	add	x2, x0, #0x700
  401384:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401388:	9117a001 	add	x1, x0, #0x5e8
  40138c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401390:	9117c000 	add	x0, x0, #0x5f0
  401394:	52800784 	mov	w4, #0x3c                  	// #60
  401398:	aa0203e3 	mov	x3, x2
  40139c:	aa0103e2 	mov	x2, x1
  4013a0:	528000a1 	mov	w1, #0x5                   	// #5
  4013a4:	97fffef3 	bl	400f70 <printf@plt>
  4013a8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4013ac:	91254001 	add	x1, x0, #0x950
  4013b0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4013b4:	91192000 	add	x0, x0, #0x648
  4013b8:	97fffeee 	bl	400f70 <printf@plt>
  4013bc:	52800140 	mov	w0, #0xa                   	// #10
  4013c0:	97fffef8 	bl	400fa0 <putchar@plt>
  4013c4:	14000077 	b	4015a0 <progarm_para+0x414>
  4013c8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4013cc:	9114f000 	add	x0, x0, #0x53c
  4013d0:	b900001f 	str	wzr, [x0]
  4013d4:	14000073 	b	4015a0 <progarm_para+0x414>
  4013d8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4013dc:	9114c000 	add	x0, x0, #0x530
  4013e0:	f9400000 	ldr	x0, [x0]
  4013e4:	97fffe87 	bl	400e00 <atoi@plt>
  4013e8:	b9006fa0 	str	w0, [x29, #108]
  4013ec:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4013f0:	9114f000 	add	x0, x0, #0x53c
  4013f4:	b9406fa1 	ldr	w1, [x29, #108]
  4013f8:	b9000001 	str	w1, [x0]
  4013fc:	b9406fa0 	ldr	w0, [x29, #108]
  401400:	7100001f 	cmp	w0, #0x0
  401404:	540000aa 	b.ge	401418 <progarm_para+0x28c>  // b.tcont
  401408:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40140c:	9114f000 	add	x0, x0, #0x53c
  401410:	b900001f 	str	wzr, [x0]
  401414:	14000008 	b	401434 <progarm_para+0x2a8>
  401418:	b9406fa0 	ldr	w0, [x29, #108]
  40141c:	7100181f 	cmp	w0, #0x6
  401420:	540000ad 	b.le	401434 <progarm_para+0x2a8>
  401424:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401428:	9114f000 	add	x0, x0, #0x53c
  40142c:	528000c1 	mov	w1, #0x6                   	// #6
  401430:	b9000001 	str	w1, [x0]
  401434:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401438:	9114f000 	add	x0, x0, #0x53c
  40143c:	b9400000 	ldr	w0, [x0]
  401440:	7100101f 	cmp	w0, #0x4
  401444:	54000aed 	b.le	4015a0 <progarm_para+0x414>
  401448:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40144c:	911c0002 	add	x2, x0, #0x700
  401450:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401454:	9117a001 	add	x1, x0, #0x5e8
  401458:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40145c:	9117c000 	add	x0, x0, #0x5f0
  401460:	528009a4 	mov	w4, #0x4d                  	// #77
  401464:	aa0203e3 	mov	x3, x2
  401468:	aa0103e2 	mov	x2, x1
  40146c:	528000a1 	mov	w1, #0x5                   	// #5
  401470:	97fffec0 	bl	400f70 <printf@plt>
  401474:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401478:	9114f000 	add	x0, x0, #0x53c
  40147c:	b9400001 	ldr	w1, [x0]
  401480:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401484:	91198000 	add	x0, x0, #0x660
  401488:	b9406fa2 	ldr	w2, [x29, #108]
  40148c:	97fffeb9 	bl	400f70 <printf@plt>
  401490:	52800140 	mov	w0, #0xa                   	// #10
  401494:	97fffec3 	bl	400fa0 <putchar@plt>
  401498:	14000042 	b	4015a0 <progarm_para+0x414>
  40149c:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4014a0:	9114c000 	add	x0, x0, #0x530
  4014a4:	f9400000 	ldr	x0, [x0]
  4014a8:	97fffe56 	bl	400e00 <atoi@plt>
  4014ac:	2a0003e1 	mov	w1, w0
  4014b0:	f9401fa0 	ldr	x0, [x29, #56]
  4014b4:	b9000001 	str	w1, [x0]
  4014b8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4014bc:	9114f000 	add	x0, x0, #0x53c
  4014c0:	b9400000 	ldr	w0, [x0]
  4014c4:	7100101f 	cmp	w0, #0x4
  4014c8:	540006cd 	b.le	4015a0 <progarm_para+0x414>
  4014cc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4014d0:	911c0002 	add	x2, x0, #0x700
  4014d4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4014d8:	9117a001 	add	x1, x0, #0x5e8
  4014dc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4014e0:	9117c000 	add	x0, x0, #0x5f0
  4014e4:	52800a64 	mov	w4, #0x53                  	// #83
  4014e8:	aa0203e3 	mov	x3, x2
  4014ec:	aa0103e2 	mov	x2, x1
  4014f0:	528000a1 	mov	w1, #0x5                   	// #5
  4014f4:	97fffe9f 	bl	400f70 <printf@plt>
  4014f8:	f9401fa0 	ldr	x0, [x29, #56]
  4014fc:	b9400001 	ldr	w1, [x0]
  401500:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401504:	911a0000 	add	x0, x0, #0x680
  401508:	97fffe9a 	bl	400f70 <printf@plt>
  40150c:	52800140 	mov	w0, #0xa                   	// #10
  401510:	97fffea4 	bl	400fa0 <putchar@plt>
  401514:	14000023 	b	4015a0 <progarm_para+0x414>
  401518:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40151c:	9114c000 	add	x0, x0, #0x530
  401520:	f9400000 	ldr	x0, [x0]
  401524:	97fffe37 	bl	400e00 <atoi@plt>
  401528:	2a0003e1 	mov	w1, w0
  40152c:	f9401ba0 	ldr	x0, [x29, #48]
  401530:	b9000001 	str	w1, [x0]
  401534:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401538:	9114f000 	add	x0, x0, #0x53c
  40153c:	b9400000 	ldr	w0, [x0]
  401540:	7100101f 	cmp	w0, #0x4
  401544:	540002ed 	b.le	4015a0 <progarm_para+0x414>
  401548:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40154c:	911c0002 	add	x2, x0, #0x700
  401550:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401554:	9117a001 	add	x1, x0, #0x5e8
  401558:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40155c:	9117c000 	add	x0, x0, #0x5f0
  401560:	52800b24 	mov	w4, #0x59                  	// #89
  401564:	aa0203e3 	mov	x3, x2
  401568:	aa0103e2 	mov	x2, x1
  40156c:	528000a1 	mov	w1, #0x5                   	// #5
  401570:	97fffe80 	bl	400f70 <printf@plt>
  401574:	f9401ba0 	ldr	x0, [x29, #48]
  401578:	b9400001 	ldr	w1, [x0]
  40157c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401580:	911a0000 	add	x0, x0, #0x680
  401584:	97fffe7b 	bl	400f70 <printf@plt>
  401588:	52800140 	mov	w0, #0xa                   	// #10
  40158c:	97fffe85 	bl	400fa0 <putchar@plt>
  401590:	14000004 	b	4015a0 <progarm_para+0x414>
  401594:	97fffec6 	bl	4010ac <printhelp>
  401598:	52800020 	mov	w0, #0x1                   	// #1
  40159c:	97fffe01 	bl	400da0 <exit@plt>
  4015a0:	f94033a2 	ldr	x2, [x29, #96]
  4015a4:	f94023a1 	ldr	x1, [x29, #64]
  4015a8:	b9404fa0 	ldr	w0, [x29, #76]
  4015ac:	97fffe29 	bl	400e50 <getopt@plt>
  4015b0:	b9005fa0 	str	w0, [x29, #92]
  4015b4:	b9405fa0 	ldr	w0, [x29, #92]
  4015b8:	3100041f 	cmn	w0, #0x1
  4015bc:	54ffe041 	b.ne	4011c4 <progarm_para+0x38>  // b.any
  4015c0:	52800000 	mov	w0, #0x0                   	// #0
  4015c4:	f9400bf3 	ldr	x19, [sp, #16]
  4015c8:	a8c77bfd 	ldp	x29, x30, [sp], #112
  4015cc:	d65f03c0 	ret

00000000004015d0 <main>:
  4015d0:	a9b67bfd 	stp	x29, x30, [sp, #-160]!
  4015d4:	910003fd 	mov	x29, sp
  4015d8:	b9001fa0 	str	w0, [x29, #28]
  4015dc:	f9000ba1 	str	x1, [x29, #16]
  4015e0:	12800000 	mov	w0, #0xffffffff            	// #-1
  4015e4:	b90037a0 	str	w0, [x29, #52]
  4015e8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4015ec:	b90033a0 	str	w0, [x29, #48]
  4015f0:	92800000 	mov	x0, #0xffffffffffffffff    	// #-1
  4015f4:	f90017a0 	str	x0, [x29, #40]
  4015f8:	b9401fa0 	ldr	w0, [x29, #28]
  4015fc:	7100041f 	cmp	w0, #0x1
  401600:	5400020d 	b.le	401640 <main+0x70>
  401604:	9100a3a2 	add	x2, x29, #0x28
  401608:	9100c3a1 	add	x1, x29, #0x30
  40160c:	9100d3a0 	add	x0, x29, #0x34
  401610:	aa0203e4 	mov	x4, x2
  401614:	aa0103e3 	mov	x3, x1
  401618:	aa0003e2 	mov	x2, x0
  40161c:	f9400ba1 	ldr	x1, [x29, #16]
  401620:	b9401fa0 	ldr	w0, [x29, #28]
  401624:	97fffeda 	bl	40118c <progarm_para>
  401628:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40162c:	9114f000 	add	x0, x0, #0x53c
  401630:	b9400000 	ldr	w0, [x0]
  401634:	7100081f 	cmp	w0, #0x2
  401638:	5400030d 	b.le	401698 <main+0xc8>
  40163c:	14000007 	b	401658 <main+0x88>
  401640:	97fffe9b 	bl	4010ac <printhelp>
  401644:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401648:	911a6000 	add	x0, x0, #0x698
  40164c:	97fffe25 	bl	400ee0 <puts@plt>
  401650:	52800020 	mov	w0, #0x1                   	// #1
  401654:	97fffdd3 	bl	400da0 <exit@plt>
  401658:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40165c:	911c4002 	add	x2, x0, #0x710
  401660:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401664:	9117a001 	add	x1, x0, #0x5e8
  401668:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40166c:	9117c000 	add	x0, x0, #0x5f0
  401670:	52801004 	mov	w4, #0x80                  	// #128
  401674:	aa0203e3 	mov	x3, x2
  401678:	aa0103e2 	mov	x2, x1
  40167c:	52800061 	mov	w1, #0x3                   	// #3
  401680:	97fffe3c 	bl	400f70 <printf@plt>
  401684:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401688:	911ae000 	add	x0, x0, #0x6b8
  40168c:	97fffe39 	bl	400f70 <printf@plt>
  401690:	52800140 	mov	w0, #0xa                   	// #10
  401694:	97fffe43 	bl	400fa0 <putchar@plt>
  401698:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40169c:	9114f000 	add	x0, x0, #0x53c
  4016a0:	b9400000 	ldr	w0, [x0]
  4016a4:	7100081f 	cmp	w0, #0x2
  4016a8:	5400028d 	b.le	4016f8 <main+0x128>
  4016ac:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4016b0:	911c4002 	add	x2, x0, #0x710
  4016b4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4016b8:	9117a001 	add	x1, x0, #0x5e8
  4016bc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4016c0:	9117c000 	add	x0, x0, #0x5f0
  4016c4:	52801044 	mov	w4, #0x82                  	// #130
  4016c8:	aa0203e3 	mov	x3, x2
  4016cc:	aa0103e2 	mov	x2, x1
  4016d0:	52800061 	mov	w1, #0x3                   	// #3
  4016d4:	97fffe27 	bl	400f70 <printf@plt>
  4016d8:	b94037a1 	ldr	w1, [x29, #52]
  4016dc:	b94033a2 	ldr	w2, [x29, #48]
  4016e0:	f94017a3 	ldr	x3, [x29, #40]
  4016e4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4016e8:	911b6000 	add	x0, x0, #0x6d8
  4016ec:	97fffe21 	bl	400f70 <printf@plt>
  4016f0:	52800140 	mov	w0, #0xa                   	// #10
  4016f4:	97fffe2b 	bl	400fa0 <putchar@plt>
  4016f8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4016fc:	91151000 	add	x0, x0, #0x544
  401700:	aa0003e5 	mov	x5, x0
  401704:	52800e64 	mov	w4, #0x73                  	// #115
  401708:	52800023 	mov	w3, #0x1                   	// #1
  40170c:	52800102 	mov	w2, #0x8                   	// #8
  401710:	52984001 	mov	w1, #0xc200                	// #49664
  401714:	72a00021 	movk	w1, #0x1, lsl #16
  401718:	52800080 	mov	w0, #0x4                   	// #4
  40171c:	9400026f 	bl	4020d8 <uart_init>
  401720:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401724:	91152000 	add	x0, x0, #0x548
  401728:	aa0003e5 	mov	x5, x0
  40172c:	52800e64 	mov	w4, #0x73                  	// #115
  401730:	52800023 	mov	w3, #0x1                   	// #1
  401734:	52800102 	mov	w2, #0x8                   	// #8
  401738:	52984001 	mov	w1, #0xc200                	// #49664
  40173c:	72a00021 	movk	w1, #0x1, lsl #16
  401740:	528000e0 	mov	w0, #0x7                   	// #7
  401744:	94000265 	bl	4020d8 <uart_init>
  401748:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40174c:	91150000 	add	x0, x0, #0x540
  401750:	aa0003e5 	mov	x5, x0
  401754:	52800e64 	mov	w4, #0x73                  	// #115
  401758:	52800023 	mov	w3, #0x1                   	// #1
  40175c:	52800102 	mov	w2, #0x8                   	// #8
  401760:	52984001 	mov	w1, #0xc200                	// #49664
  401764:	72a00021 	movk	w1, #0x1, lsl #16
  401768:	52800020 	mov	w0, #0x1                   	// #1
  40176c:	9400025b 	bl	4020d8 <uart_init>
  401770:	9100e3a0 	add	x0, x29, #0x38
  401774:	97fffd97 	bl	400dd0 <pthread_attr_init@plt>
  401778:	f9004fbf 	str	xzr, [x29, #152]
  40177c:	90000000 	adrp	x0, 401000 <call_weak_fn+0x8>
  401780:	913a7002 	add	x2, x0, #0xe9c
  401784:	9100e3a1 	add	x1, x29, #0x38
  401788:	910263a0 	add	x0, x29, #0x98
  40178c:	d2800003 	mov	x3, #0x0                   	// #0
  401790:	97fffdbc 	bl	400e80 <pthread_create@plt>
  401794:	f90047bf 	str	xzr, [x29, #136]
  401798:	90000000 	adrp	x0, 401000 <call_weak_fn+0x8>
  40179c:	913dc002 	add	x2, x0, #0xf70
  4017a0:	9100e3a1 	add	x1, x29, #0x38
  4017a4:	910223a0 	add	x0, x29, #0x88
  4017a8:	d2800003 	mov	x3, #0x0                   	// #0
  4017ac:	97fffdb5 	bl	400e80 <pthread_create@plt>
  4017b0:	f9004bbf 	str	xzr, [x29, #144]
  4017b4:	b0000000 	adrp	x0, 402000 <uartbd_receive_thread+0x90>
  4017b8:	91011001 	add	x1, x0, #0x44
  4017bc:	910243a0 	add	x0, x29, #0x90
  4017c0:	d2800003 	mov	x3, #0x0                   	// #0
  4017c4:	aa0103e2 	mov	x2, x1
  4017c8:	d2800001 	mov	x1, #0x0                   	// #0
  4017cc:	97fffdad 	bl	400e80 <pthread_create@plt>
  4017d0:	f90043bf 	str	xzr, [x29, #128]
  4017d4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4017d8:	91077001 	add	x1, x0, #0x1dc
  4017dc:	910203a0 	add	x0, x29, #0x80
  4017e0:	d2800003 	mov	x3, #0x0                   	// #0
  4017e4:	aa0103e2 	mov	x2, x1
  4017e8:	d2800001 	mov	x1, #0x0                   	// #0
  4017ec:	97fffda5 	bl	400e80 <pthread_create@plt>
  4017f0:	f9404fa0 	ldr	x0, [x29, #152]
  4017f4:	9101e3a1 	add	x1, x29, #0x78
  4017f8:	97fffdae 	bl	400eb0 <pthread_join@plt>
  4017fc:	f94047a0 	ldr	x0, [x29, #136]
  401800:	9101e3a1 	add	x1, x29, #0x78
  401804:	97fffdab 	bl	400eb0 <pthread_join@plt>
  401808:	f9404ba0 	ldr	x0, [x29, #144]
  40180c:	9101e3a1 	add	x1, x29, #0x78
  401810:	97fffda8 	bl	400eb0 <pthread_join@plt>
  401814:	f94043a0 	ldr	x0, [x29, #128]
  401818:	9101e3a1 	add	x1, x29, #0x78
  40181c:	97fffda5 	bl	400eb0 <pthread_join@plt>
  401820:	52800000 	mov	w0, #0x0                   	// #0
  401824:	a8ca7bfd 	ldp	x29, x30, [sp], #160
  401828:	d65f03c0 	ret

000000000040182c <serial_open>:
  40182c:	a9b67bfd 	stp	x29, x30, [sp, #-160]!
  401830:	910003fd 	mov	x29, sp
  401834:	b9001fa0 	str	w0, [x29, #28]
  401838:	f9000ba1 	str	x1, [x29, #16]
  40183c:	b9401fa0 	ldr	w0, [x29, #28]
  401840:	7100001f 	cmp	w0, #0x0
  401844:	54000141 	b.ne	40186c <serial_open+0x40>  // b.any
  401848:	910083a2 	add	x2, x29, #0x20
  40184c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401850:	911c6001 	add	x1, x0, #0x718
  401854:	aa0203e0 	mov	x0, x2
  401858:	f9400022 	ldr	x2, [x1]
  40185c:	f9000002 	str	x2, [x0]
  401860:	b8407021 	ldur	w1, [x1, #7]
  401864:	b8007001 	stur	w1, [x0, #7]
  401868:	14000069 	b	401a0c <serial_open+0x1e0>
  40186c:	b9401fa0 	ldr	w0, [x29, #28]
  401870:	7100041f 	cmp	w0, #0x1
  401874:	54000141 	b.ne	40189c <serial_open+0x70>  // b.any
  401878:	910083a2 	add	x2, x29, #0x20
  40187c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401880:	911ca001 	add	x1, x0, #0x728
  401884:	aa0203e0 	mov	x0, x2
  401888:	f9400022 	ldr	x2, [x1]
  40188c:	f9000002 	str	x2, [x0]
  401890:	b8407021 	ldur	w1, [x1, #7]
  401894:	b8007001 	stur	w1, [x0, #7]
  401898:	1400005d 	b	401a0c <serial_open+0x1e0>
  40189c:	b9401fa0 	ldr	w0, [x29, #28]
  4018a0:	7100081f 	cmp	w0, #0x2
  4018a4:	54000141 	b.ne	4018cc <serial_open+0xa0>  // b.any
  4018a8:	910083a2 	add	x2, x29, #0x20
  4018ac:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4018b0:	911ce001 	add	x1, x0, #0x738
  4018b4:	aa0203e0 	mov	x0, x2
  4018b8:	f9400022 	ldr	x2, [x1]
  4018bc:	f9000002 	str	x2, [x0]
  4018c0:	b8407021 	ldur	w1, [x1, #7]
  4018c4:	b8007001 	stur	w1, [x0, #7]
  4018c8:	14000051 	b	401a0c <serial_open+0x1e0>
  4018cc:	b9401fa0 	ldr	w0, [x29, #28]
  4018d0:	71000c1f 	cmp	w0, #0x3
  4018d4:	54000141 	b.ne	4018fc <serial_open+0xd0>  // b.any
  4018d8:	910083a2 	add	x2, x29, #0x20
  4018dc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4018e0:	911d2001 	add	x1, x0, #0x748
  4018e4:	aa0203e0 	mov	x0, x2
  4018e8:	f9400022 	ldr	x2, [x1]
  4018ec:	f9000002 	str	x2, [x0]
  4018f0:	b8407021 	ldur	w1, [x1, #7]
  4018f4:	b8007001 	stur	w1, [x0, #7]
  4018f8:	14000045 	b	401a0c <serial_open+0x1e0>
  4018fc:	b9401fa0 	ldr	w0, [x29, #28]
  401900:	7100101f 	cmp	w0, #0x4
  401904:	54000141 	b.ne	40192c <serial_open+0x100>  // b.any
  401908:	910083a2 	add	x2, x29, #0x20
  40190c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401910:	911d6001 	add	x1, x0, #0x758
  401914:	aa0203e0 	mov	x0, x2
  401918:	f9400022 	ldr	x2, [x1]
  40191c:	f9000002 	str	x2, [x0]
  401920:	b8407021 	ldur	w1, [x1, #7]
  401924:	b8007001 	stur	w1, [x0, #7]
  401928:	14000039 	b	401a0c <serial_open+0x1e0>
  40192c:	b9401fa0 	ldr	w0, [x29, #28]
  401930:	7100141f 	cmp	w0, #0x5
  401934:	54000141 	b.ne	40195c <serial_open+0x130>  // b.any
  401938:	910083a2 	add	x2, x29, #0x20
  40193c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401940:	911da001 	add	x1, x0, #0x768
  401944:	aa0203e0 	mov	x0, x2
  401948:	f9400022 	ldr	x2, [x1]
  40194c:	f9000002 	str	x2, [x0]
  401950:	b8407021 	ldur	w1, [x1, #7]
  401954:	b8007001 	stur	w1, [x0, #7]
  401958:	1400002d 	b	401a0c <serial_open+0x1e0>
  40195c:	b9401fa0 	ldr	w0, [x29, #28]
  401960:	7100181f 	cmp	w0, #0x6
  401964:	54000141 	b.ne	40198c <serial_open+0x160>  // b.any
  401968:	910083a2 	add	x2, x29, #0x20
  40196c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401970:	911de001 	add	x1, x0, #0x778
  401974:	aa0203e0 	mov	x0, x2
  401978:	f9400022 	ldr	x2, [x1]
  40197c:	f9000002 	str	x2, [x0]
  401980:	b8407021 	ldur	w1, [x1, #7]
  401984:	b8007001 	stur	w1, [x0, #7]
  401988:	14000021 	b	401a0c <serial_open+0x1e0>
  40198c:	b9401fa0 	ldr	w0, [x29, #28]
  401990:	71001c1f 	cmp	w0, #0x7
  401994:	54000141 	b.ne	4019bc <serial_open+0x190>  // b.any
  401998:	910083a2 	add	x2, x29, #0x20
  40199c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4019a0:	911e2001 	add	x1, x0, #0x788
  4019a4:	aa0203e0 	mov	x0, x2
  4019a8:	f9400022 	ldr	x2, [x1]
  4019ac:	f9000002 	str	x2, [x0]
  4019b0:	b8407021 	ldur	w1, [x1, #7]
  4019b4:	b8007001 	stur	w1, [x0, #7]
  4019b8:	14000015 	b	401a0c <serial_open+0x1e0>
  4019bc:	b9401fa0 	ldr	w0, [x29, #28]
  4019c0:	7100201f 	cmp	w0, #0x8
  4019c4:	54000141 	b.ne	4019ec <serial_open+0x1c0>  // b.any
  4019c8:	910083a2 	add	x2, x29, #0x20
  4019cc:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4019d0:	911e6001 	add	x1, x0, #0x798
  4019d4:	aa0203e0 	mov	x0, x2
  4019d8:	f9400022 	ldr	x2, [x1]
  4019dc:	f9000002 	str	x2, [x0]
  4019e0:	b8407021 	ldur	w1, [x1, #7]
  4019e4:	b8007001 	stur	w1, [x0, #7]
  4019e8:	14000009 	b	401a0c <serial_open+0x1e0>
  4019ec:	910083a2 	add	x2, x29, #0x20
  4019f0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4019f4:	911ea001 	add	x1, x0, #0x7a8
  4019f8:	aa0203e0 	mov	x0, x2
  4019fc:	f9400022 	ldr	x2, [x1]
  401a00:	f9000002 	str	x2, [x0]
  401a04:	b8407021 	ldur	w1, [x1, #7]
  401a08:	b8007001 	stur	w1, [x0, #7]
  401a0c:	910083a0 	add	x0, x29, #0x20
  401a10:	52812041 	mov	w1, #0x902                 	// #2306
  401a14:	97fffd03 	bl	400e20 <open@plt>
  401a18:	2a0003e1 	mov	w1, w0
  401a1c:	f9400ba0 	ldr	x0, [x29, #16]
  401a20:	b9000001 	str	w1, [x0]
  401a24:	f9400ba0 	ldr	x0, [x29, #16]
  401a28:	b9400000 	ldr	w0, [x0]
  401a2c:	52800002 	mov	w2, #0x0                   	// #0
  401a30:	52800081 	mov	w1, #0x4                   	// #4
  401a34:	97fffd2f 	bl	400ef0 <fcntl@plt>
  401a38:	7100001f 	cmp	w0, #0x0
  401a3c:	540000ca 	b.ge	401a54 <serial_open+0x228>  // b.tcont
  401a40:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401a44:	911ee000 	add	x0, x0, #0x7b8
  401a48:	97fffd26 	bl	400ee0 <puts@plt>
  401a4c:	12800000 	mov	w0, #0xffffffff            	// #-1
  401a50:	14000011 	b	401a94 <serial_open+0x268>
  401a54:	f9400ba0 	ldr	x0, [x29, #16]
  401a58:	b9400000 	ldr	w0, [x0]
  401a5c:	52800002 	mov	w2, #0x0                   	// #0
  401a60:	52800081 	mov	w1, #0x4                   	// #4
  401a64:	97fffd23 	bl	400ef0 <fcntl@plt>
  401a68:	2a0003e1 	mov	w1, w0
  401a6c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401a70:	911f2000 	add	x0, x0, #0x7c8
  401a74:	97fffd3f 	bl	400f70 <printf@plt>
  401a78:	52800000 	mov	w0, #0x0                   	// #0
  401a7c:	97fffd29 	bl	400f20 <isatty@plt>
  401a80:	910083a1 	add	x1, x29, #0x20
  401a84:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401a88:	911f6000 	add	x0, x0, #0x7d8
  401a8c:	97fffd39 	bl	400f70 <printf@plt>
  401a90:	52800000 	mov	w0, #0x0                   	// #0
  401a94:	a8ca7bfd 	ldp	x29, x30, [sp], #160
  401a98:	d65f03c0 	ret

0000000000401a9c <set_speed>:
  401a9c:	a9b27bfd 	stp	x29, x30, [sp, #-224]!
  401aa0:	910003fd 	mov	x29, sp
  401aa4:	b9001fa0 	str	w0, [x29, #28]
  401aa8:	b9001ba1 	str	w1, [x29, #24]
  401aac:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401ab0:	91200001 	add	x1, x0, #0x800
  401ab4:	910183a0 	add	x0, x29, #0x60
  401ab8:	a9400c22 	ldp	x2, x3, [x1]
  401abc:	a9000c02 	stp	x2, x3, [x0]
  401ac0:	a9410c22 	ldp	x2, x3, [x1, #16]
  401ac4:	a9010c02 	stp	x2, x3, [x0, #16]
  401ac8:	a9420c22 	ldp	x2, x3, [x1, #32]
  401acc:	a9020c02 	stp	x2, x3, [x0, #32]
  401ad0:	f9401821 	ldr	x1, [x1, #48]
  401ad4:	f9001801 	str	x1, [x0, #48]
  401ad8:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401adc:	9120e001 	add	x1, x0, #0x838
  401ae0:	9100a3a0 	add	x0, x29, #0x28
  401ae4:	a9400c22 	ldp	x2, x3, [x1]
  401ae8:	a9000c02 	stp	x2, x3, [x0]
  401aec:	a9410c22 	ldp	x2, x3, [x1, #16]
  401af0:	a9010c02 	stp	x2, x3, [x0, #16]
  401af4:	a9420c22 	ldp	x2, x3, [x1, #32]
  401af8:	a9020c02 	stp	x2, x3, [x0, #32]
  401afc:	f9401821 	ldr	x1, [x1, #48]
  401b00:	f9001801 	str	x1, [x0, #48]
  401b04:	910263a0 	add	x0, x29, #0x98
  401b08:	aa0003e1 	mov	x1, x0
  401b0c:	b9401fa0 	ldr	w0, [x29, #28]
  401b10:	97fffcb8 	bl	400df0 <tcgetattr@plt>
  401b14:	b900dfbf 	str	wzr, [x29, #220]
  401b18:	1400002d 	b	401bcc <set_speed+0x130>
  401b1c:	b980dfa0 	ldrsw	x0, [x29, #220]
  401b20:	d37ef400 	lsl	x0, x0, #2
  401b24:	9100a3a1 	add	x1, x29, #0x28
  401b28:	b8606820 	ldr	w0, [x1, x0]
  401b2c:	b9401ba1 	ldr	w1, [x29, #24]
  401b30:	6b00003f 	cmp	w1, w0
  401b34:	54000461 	b.ne	401bc0 <set_speed+0x124>  // b.any
  401b38:	52800041 	mov	w1, #0x2                   	// #2
  401b3c:	b9401fa0 	ldr	w0, [x29, #28]
  401b40:	97fffc90 	bl	400d80 <tcflush@plt>
  401b44:	b980dfa0 	ldrsw	x0, [x29, #220]
  401b48:	d37ef400 	lsl	x0, x0, #2
  401b4c:	910183a1 	add	x1, x29, #0x60
  401b50:	b8606820 	ldr	w0, [x1, x0]
  401b54:	2a0003e1 	mov	w1, w0
  401b58:	910263a0 	add	x0, x29, #0x98
  401b5c:	97fffcfd 	bl	400f50 <cfsetispeed@plt>
  401b60:	b980dfa0 	ldrsw	x0, [x29, #220]
  401b64:	d37ef400 	lsl	x0, x0, #2
  401b68:	910183a1 	add	x1, x29, #0x60
  401b6c:	b8606820 	ldr	w0, [x1, x0]
  401b70:	2a0003e1 	mov	w1, w0
  401b74:	910263a0 	add	x0, x29, #0x98
  401b78:	97fffc9a 	bl	400de0 <cfsetospeed@plt>
  401b7c:	910263a0 	add	x0, x29, #0x98
  401b80:	aa0003e2 	mov	x2, x0
  401b84:	52800001 	mov	w1, #0x0                   	// #0
  401b88:	b9401fa0 	ldr	w0, [x29, #28]
  401b8c:	97fffce1 	bl	400f10 <tcsetattr@plt>
  401b90:	b900dba0 	str	w0, [x29, #216]
  401b94:	b940dba0 	ldr	w0, [x29, #216]
  401b98:	7100001f 	cmp	w0, #0x0
  401b9c:	540000c0 	b.eq	401bb4 <set_speed+0x118>  // b.none
  401ba0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401ba4:	911fc000 	add	x0, x0, #0x7f0
  401ba8:	97fffc82 	bl	400db0 <perror@plt>
  401bac:	12800000 	mov	w0, #0xffffffff            	// #-1
  401bb0:	1400000b 	b	401bdc <set_speed+0x140>
  401bb4:	52800041 	mov	w1, #0x2                   	// #2
  401bb8:	b9401fa0 	ldr	w0, [x29, #28]
  401bbc:	97fffc71 	bl	400d80 <tcflush@plt>
  401bc0:	b940dfa0 	ldr	w0, [x29, #220]
  401bc4:	11000400 	add	w0, w0, #0x1
  401bc8:	b900dfa0 	str	w0, [x29, #220]
  401bcc:	b940dfa0 	ldr	w0, [x29, #220]
  401bd0:	7100341f 	cmp	w0, #0xd
  401bd4:	54fffa49 	b.ls	401b1c <set_speed+0x80>  // b.plast
  401bd8:	52800000 	mov	w0, #0x0                   	// #0
  401bdc:	a8ce7bfd 	ldp	x29, x30, [sp], #224
  401be0:	d65f03c0 	ret

0000000000401be4 <set_parity>:
  401be4:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  401be8:	910003fd 	mov	x29, sp
  401bec:	b9001fa0 	str	w0, [x29, #28]
  401bf0:	b9001ba1 	str	w1, [x29, #24]
  401bf4:	b90017a2 	str	w2, [x29, #20]
  401bf8:	b90013a3 	str	w3, [x29, #16]
  401bfc:	910083a0 	add	x0, x29, #0x20
  401c00:	aa0003e1 	mov	x1, x0
  401c04:	b9401fa0 	ldr	w0, [x29, #28]
  401c08:	97fffc7a 	bl	400df0 <tcgetattr@plt>
  401c0c:	7100001f 	cmp	w0, #0x0
  401c10:	540000c0 	b.eq	401c28 <set_parity+0x44>  // b.none
  401c14:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401c18:	9121c000 	add	x0, x0, #0x870
  401c1c:	97fffc65 	bl	400db0 <perror@plt>
  401c20:	12800000 	mov	w0, #0xffffffff            	// #-1
  401c24:	1400009c 	b	401e94 <set_parity+0x2b0>
  401c28:	910083a0 	add	x0, x29, #0x20
  401c2c:	97fffcc1 	bl	400f30 <cfmakeraw@plt>
  401c30:	b9402ba1 	ldr	w1, [x29, #40]
  401c34:	52811000 	mov	w0, #0x880                 	// #2176
  401c38:	2a000020 	orr	w0, w1, w0
  401c3c:	b9002ba0 	str	w0, [x29, #40]
  401c40:	b9402ba0 	ldr	w0, [x29, #40]
  401c44:	121a7400 	and	w0, w0, #0xffffffcf
  401c48:	b9002ba0 	str	w0, [x29, #40]
  401c4c:	b9401ba0 	ldr	w0, [x29, #24]
  401c50:	71001c1f 	cmp	w0, #0x7
  401c54:	54000080 	b.eq	401c64 <set_parity+0x80>  // b.none
  401c58:	7100201f 	cmp	w0, #0x8
  401c5c:	540000c0 	b.eq	401c74 <set_parity+0x90>  // b.none
  401c60:	14000009 	b	401c84 <set_parity+0xa0>
  401c64:	b9402ba0 	ldr	w0, [x29, #40]
  401c68:	321b0000 	orr	w0, w0, #0x20
  401c6c:	b9002ba0 	str	w0, [x29, #40]
  401c70:	1400000a 	b	401c98 <set_parity+0xb4>
  401c74:	b9402ba0 	ldr	w0, [x29, #40]
  401c78:	321c0400 	orr	w0, w0, #0x30
  401c7c:	b9002ba0 	str	w0, [x29, #40]
  401c80:	14000006 	b	401c98 <set_parity+0xb4>
  401c84:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401c88:	91222000 	add	x0, x0, #0x888
  401c8c:	97fffc49 	bl	400db0 <perror@plt>
  401c90:	12800000 	mov	w0, #0xffffffff            	// #-1
  401c94:	14000080 	b	401e94 <set_parity+0x2b0>
  401c98:	b94013a0 	ldr	w0, [x29, #16]
  401c9c:	71014c1f 	cmp	w0, #0x53
  401ca0:	540005c0 	b.eq	401d58 <set_parity+0x174>  // b.none
  401ca4:	71014c1f 	cmp	w0, #0x53
  401ca8:	5400010c 	b.gt	401cc8 <set_parity+0xe4>
  401cac:	7101381f 	cmp	w0, #0x4e
  401cb0:	54000240 	b.eq	401cf8 <set_parity+0x114>  // b.none
  401cb4:	71013c1f 	cmp	w0, #0x4f
  401cb8:	540002e0 	b.eq	401d14 <set_parity+0x130>  // b.none
  401cbc:	7101141f 	cmp	w0, #0x45
  401cc0:	54000380 	b.eq	401d30 <set_parity+0x14c>  // b.none
  401cc4:	1400002c 	b	401d74 <set_parity+0x190>
  401cc8:	7101b81f 	cmp	w0, #0x6e
  401ccc:	54000160 	b.eq	401cf8 <set_parity+0x114>  // b.none
  401cd0:	7101b81f 	cmp	w0, #0x6e
  401cd4:	5400008c 	b.gt	401ce4 <set_parity+0x100>
  401cd8:	7101941f 	cmp	w0, #0x65
  401cdc:	540002a0 	b.eq	401d30 <set_parity+0x14c>  // b.none
  401ce0:	14000025 	b	401d74 <set_parity+0x190>
  401ce4:	7101bc1f 	cmp	w0, #0x6f
  401ce8:	54000160 	b.eq	401d14 <set_parity+0x130>  // b.none
  401cec:	7101cc1f 	cmp	w0, #0x73
  401cf0:	54000340 	b.eq	401d58 <set_parity+0x174>  // b.none
  401cf4:	14000020 	b	401d74 <set_parity+0x190>
  401cf8:	b9402ba0 	ldr	w0, [x29, #40]
  401cfc:	12177800 	and	w0, w0, #0xfffffeff
  401d00:	b9002ba0 	str	w0, [x29, #40]
  401d04:	b94023a0 	ldr	w0, [x29, #32]
  401d08:	121b7800 	and	w0, w0, #0xffffffef
  401d0c:	b90023a0 	str	w0, [x29, #32]
  401d10:	1400001e 	b	401d88 <set_parity+0x1a4>
  401d14:	b9402ba0 	ldr	w0, [x29, #40]
  401d18:	32180400 	orr	w0, w0, #0x300
  401d1c:	b9002ba0 	str	w0, [x29, #40]
  401d20:	b94023a0 	ldr	w0, [x29, #32]
  401d24:	321c0000 	orr	w0, w0, #0x10
  401d28:	b90023a0 	str	w0, [x29, #32]
  401d2c:	14000017 	b	401d88 <set_parity+0x1a4>
  401d30:	b9402ba0 	ldr	w0, [x29, #40]
  401d34:	32180000 	orr	w0, w0, #0x100
  401d38:	b9002ba0 	str	w0, [x29, #40]
  401d3c:	b9402ba0 	ldr	w0, [x29, #40]
  401d40:	12167800 	and	w0, w0, #0xfffffdff
  401d44:	b9002ba0 	str	w0, [x29, #40]
  401d48:	b94023a0 	ldr	w0, [x29, #32]
  401d4c:	321c0000 	orr	w0, w0, #0x10
  401d50:	b90023a0 	str	w0, [x29, #32]
  401d54:	1400000d 	b	401d88 <set_parity+0x1a4>
  401d58:	b9402ba0 	ldr	w0, [x29, #40]
  401d5c:	12177800 	and	w0, w0, #0xfffffeff
  401d60:	b9002ba0 	str	w0, [x29, #40]
  401d64:	b9402ba0 	ldr	w0, [x29, #40]
  401d68:	12197800 	and	w0, w0, #0xffffffbf
  401d6c:	b9002ba0 	str	w0, [x29, #40]
  401d70:	14000006 	b	401d88 <set_parity+0x1a4>
  401d74:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401d78:	91228000 	add	x0, x0, #0x8a0
  401d7c:	97fffc0d 	bl	400db0 <perror@plt>
  401d80:	12800000 	mov	w0, #0xffffffff            	// #-1
  401d84:	14000044 	b	401e94 <set_parity+0x2b0>
  401d88:	b94017a0 	ldr	w0, [x29, #20]
  401d8c:	7100041f 	cmp	w0, #0x1
  401d90:	54000080 	b.eq	401da0 <set_parity+0x1bc>  // b.none
  401d94:	7100081f 	cmp	w0, #0x2
  401d98:	540000c0 	b.eq	401db0 <set_parity+0x1cc>  // b.none
  401d9c:	14000009 	b	401dc0 <set_parity+0x1dc>
  401da0:	b9402ba0 	ldr	w0, [x29, #40]
  401da4:	12197800 	and	w0, w0, #0xffffffbf
  401da8:	b9002ba0 	str	w0, [x29, #40]
  401dac:	1400000a 	b	401dd4 <set_parity+0x1f0>
  401db0:	b9402ba0 	ldr	w0, [x29, #40]
  401db4:	321a0000 	orr	w0, w0, #0x40
  401db8:	b9002ba0 	str	w0, [x29, #40]
  401dbc:	14000006 	b	401dd4 <set_parity+0x1f0>
  401dc0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401dc4:	9122e000 	add	x0, x0, #0x8b8
  401dc8:	97fffbfa 	bl	400db0 <perror@plt>
  401dcc:	12800000 	mov	w0, #0xffffffff            	// #-1
  401dd0:	14000031 	b	401e94 <set_parity+0x2b0>
  401dd4:	b94013a0 	ldr	w0, [x29, #16]
  401dd8:	7101b81f 	cmp	w0, #0x6e
  401ddc:	54000080 	b.eq	401dec <set_parity+0x208>  // b.none
  401de0:	b94023a0 	ldr	w0, [x29, #32]
  401de4:	321c0000 	orr	w0, w0, #0x10
  401de8:	b90023a0 	str	w0, [x29, #32]
  401dec:	b9402fa1 	ldr	w1, [x29, #44]
  401df0:	12800360 	mov	w0, #0xffffffe4            	// #-28
  401df4:	0a000020 	and	w0, w1, w0
  401df8:	b9002fa0 	str	w0, [x29, #44]
  401dfc:	b94027a0 	ldr	w0, [x29, #36]
  401e00:	121f7800 	and	w0, w0, #0xfffffffe
  401e04:	b90027a0 	str	w0, [x29, #36]
  401e08:	b9402ba0 	ldr	w0, [x29, #40]
  401e0c:	12007800 	and	w0, w0, #0x7fffffff
  401e10:	b9002ba0 	str	w0, [x29, #40]
  401e14:	b94023a0 	ldr	w0, [x29, #32]
  401e18:	12137800 	and	w0, w0, #0xffffefff
  401e1c:	b90023a0 	str	w0, [x29, #32]
  401e20:	b94023a0 	ldr	w0, [x29, #32]
  401e24:	12157800 	and	w0, w0, #0xfffffbff
  401e28:	b90023a0 	str	w0, [x29, #32]
  401e2c:	b94023a0 	ldr	w0, [x29, #32]
  401e30:	12177400 	and	w0, w0, #0xfffffe7f
  401e34:	b90023a0 	str	w0, [x29, #32]
  401e38:	b94023a1 	ldr	w1, [x29, #32]
  401e3c:	12802800 	mov	w0, #0xfffffebf            	// #-321
  401e40:	0a000020 	and	w0, w1, w0
  401e44:	b90023a0 	str	w0, [x29, #32]
  401e48:	b94023a0 	ldr	w0, [x29, #32]
  401e4c:	12137000 	and	w0, w0, #0xffffe3ff
  401e50:	b90023a0 	str	w0, [x29, #32]
  401e54:	52800001 	mov	w1, #0x0                   	// #0
  401e58:	b9401fa0 	ldr	w0, [x29, #28]
  401e5c:	97fffbc9 	bl	400d80 <tcflush@plt>
  401e60:	910083a0 	add	x0, x29, #0x20
  401e64:	aa0003e2 	mov	x2, x0
  401e68:	52800001 	mov	w1, #0x0                   	// #0
  401e6c:	b9401fa0 	ldr	w0, [x29, #28]
  401e70:	97fffc28 	bl	400f10 <tcsetattr@plt>
  401e74:	7100001f 	cmp	w0, #0x0
  401e78:	540000c0 	b.eq	401e90 <set_parity+0x2ac>  // b.none
  401e7c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401e80:	91234000 	add	x0, x0, #0x8d0
  401e84:	97fffbcb 	bl	400db0 <perror@plt>
  401e88:	12800000 	mov	w0, #0xffffffff            	// #-1
  401e8c:	14000002 	b	401e94 <set_parity+0x2b0>
  401e90:	52800020 	mov	w0, #0x1                   	// #1
  401e94:	a8c67bfd 	ldp	x29, x30, [sp], #96
  401e98:	d65f03c0 	ret

0000000000401e9c <uartac_receive_thread>:
  401e9c:	d120c3ff 	sub	sp, sp, #0x830
  401ea0:	a9007bfd 	stp	x29, x30, [sp]
  401ea4:	910003fd 	mov	x29, sp
  401ea8:	f9000fa0 	str	x0, [x29, #24]
  401eac:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401eb0:	91151000 	add	x0, x0, #0x544
  401eb4:	b9400000 	ldr	w0, [x0]
  401eb8:	7100001f 	cmp	w0, #0x0
  401ebc:	5400006a 	b.ge	401ec8 <uartac_receive_thread+0x2c>  // b.tcont
  401ec0:	d2800000 	mov	x0, #0x0                   	// #0
  401ec4:	97fffc03 	bl	400ed0 <pthread_exit@plt>
  401ec8:	97fffbd2 	bl	400e10 <getpid@plt>
  401ecc:	2a0003e1 	mov	w1, w0
  401ed0:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401ed4:	9123c000 	add	x0, x0, #0x8f0
  401ed8:	97fffc26 	bl	400f70 <printf@plt>
  401edc:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401ee0:	91151000 	add	x0, x0, #0x544
  401ee4:	b9400000 	ldr	w0, [x0]
  401ee8:	52800041 	mov	w1, #0x2                   	// #2
  401eec:	97fffba5 	bl	400d80 <tcflush@plt>
  401ef0:	9100a3a0 	add	x0, x29, #0x28
  401ef4:	d2810002 	mov	x2, #0x800                 	// #2048
  401ef8:	52800001 	mov	w1, #0x0                   	// #0
  401efc:	97fffbd1 	bl	400e40 <memset@plt>
  401f00:	b9082fbf 	str	wzr, [x29, #2092]
  401f04:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401f08:	91151000 	add	x0, x0, #0x544
  401f0c:	b9400000 	ldr	w0, [x0]
  401f10:	9100a3a1 	add	x1, x29, #0x28
  401f14:	d2810002 	mov	x2, #0x800                 	// #2048
  401f18:	97fffbfa 	bl	400f00 <read@plt>
  401f1c:	b9082fa0 	str	w0, [x29, #2092]
  401f20:	b9482fa0 	ldr	w0, [x29, #2092]
  401f24:	7100001f 	cmp	w0, #0x0
  401f28:	540001aa 	b.ge	401f5c <uartac_receive_thread+0xc0>  // b.tcont
  401f2c:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401f30:	9124c000 	add	x0, x0, #0x930
  401f34:	b9482fa1 	ldr	w1, [x29, #2092]
  401f38:	97fffc0e 	bl	400f70 <printf@plt>
  401f3c:	d503201f 	nop
  401f40:	97fffbb4 	bl	400e10 <getpid@plt>
  401f44:	2a0003e1 	mov	w1, w0
  401f48:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401f4c:	91256000 	add	x0, x0, #0x958
  401f50:	97fffc08 	bl	400f70 <printf@plt>
  401f54:	d2800000 	mov	x0, #0x0                   	// #0
  401f58:	97fffbde 	bl	400ed0 <pthread_exit@plt>
  401f5c:	9100a3a0 	add	x0, x29, #0x28
  401f60:	aa0003e1 	mov	x1, x0
  401f64:	b9482fa0 	ldr	w0, [x29, #2092]
  401f68:	94000308 	bl	402b88 <receive_data_analy>
  401f6c:	17ffffdc 	b	401edc <uartac_receive_thread+0x40>

0000000000401f70 <uartbd_receive_thread>:
  401f70:	d120c3ff 	sub	sp, sp, #0x830
  401f74:	a9007bfd 	stp	x29, x30, [sp]
  401f78:	910003fd 	mov	x29, sp
  401f7c:	f9000fa0 	str	x0, [x29, #24]
  401f80:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401f84:	91152000 	add	x0, x0, #0x548
  401f88:	b9400000 	ldr	w0, [x0]
  401f8c:	7100001f 	cmp	w0, #0x0
  401f90:	5400006a 	b.ge	401f9c <uartbd_receive_thread+0x2c>  // b.tcont
  401f94:	d2800000 	mov	x0, #0x0                   	// #0
  401f98:	97fffbce 	bl	400ed0 <pthread_exit@plt>
  401f9c:	97fffb9d 	bl	400e10 <getpid@plt>
  401fa0:	2a0003e1 	mov	w1, w0
  401fa4:	d0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  401fa8:	9125e000 	add	x0, x0, #0x978
  401fac:	97fffbf1 	bl	400f70 <printf@plt>
  401fb0:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401fb4:	91152000 	add	x0, x0, #0x548
  401fb8:	b9400000 	ldr	w0, [x0]
  401fbc:	52800041 	mov	w1, #0x2                   	// #2
  401fc0:	97fffb70 	bl	400d80 <tcflush@plt>
  401fc4:	9100a3a0 	add	x0, x29, #0x28
  401fc8:	d2810002 	mov	x2, #0x800                 	// #2048
  401fcc:	52800001 	mov	w1, #0x0                   	// #0
  401fd0:	97fffb9c 	bl	400e40 <memset@plt>
  401fd4:	b9082fbf 	str	wzr, [x29, #2092]
  401fd8:	f0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  401fdc:	91152000 	add	x0, x0, #0x548
  401fe0:	b9400000 	ldr	w0, [x0]
  401fe4:	9100a3a1 	add	x1, x29, #0x28
  401fe8:	d2810002 	mov	x2, #0x800                 	// #2048
  401fec:	97fffbc5 	bl	400f00 <read@plt>
  401ff0:	b9082fa0 	str	w0, [x29, #2092]
  401ff4:	b9482fa0 	ldr	w0, [x29, #2092]
  401ff8:	7100001f 	cmp	w0, #0x0
  401ffc:	540001aa 	b.ge	402030 <uartbd_receive_thread+0xc0>  // b.tcont
  402000:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402004:	9124c000 	add	x0, x0, #0x930
  402008:	b9482fa1 	ldr	w1, [x29, #2092]
  40200c:	97fffbd9 	bl	400f70 <printf@plt>
  402010:	d503201f 	nop
  402014:	97fffb7f 	bl	400e10 <getpid@plt>
  402018:	2a0003e1 	mov	w1, w0
  40201c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402020:	91256000 	add	x0, x0, #0x958
  402024:	97fffbd3 	bl	400f70 <printf@plt>
  402028:	d2800000 	mov	x0, #0x0                   	// #0
  40202c:	97fffba9 	bl	400ed0 <pthread_exit@plt>
  402030:	9100a3a0 	add	x0, x29, #0x28
  402034:	aa0003e1 	mov	x1, x0
  402038:	b9482fa0 	ldr	w0, [x29, #2092]
  40203c:	940002dd 	bl	402bb0 <receive_data_analy_bd>
  402040:	17ffffdc 	b	401fb0 <uartbd_receive_thread+0x40>

0000000000402044 <uart_send_thread>:
  402044:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  402048:	910003fd 	mov	x29, sp
  40204c:	f9000fa0 	str	x0, [x29, #24]
  402050:	97fffb70 	bl	400e10 <getpid@plt>
  402054:	2a0003e1 	mov	w1, w0
  402058:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40205c:	9126e000 	add	x0, x0, #0x9b8
  402060:	97fffbc4 	bl	400f70 <printf@plt>
  402064:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402068:	91268000 	add	x0, x0, #0x9a0
  40206c:	91401000 	add	x0, x0, #0x4, lsl #12
  402070:	39444000 	ldrb	w0, [x0, #272]
  402074:	71000c1f 	cmp	w0, #0x3
  402078:	54ffff61 	b.ne	402064 <uart_send_thread+0x20>  // b.any
  40207c:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402080:	91268000 	add	x0, x0, #0x9a0
  402084:	91401000 	add	x0, x0, #0x4, lsl #12
  402088:	39444400 	ldrb	w0, [x0, #273]
  40208c:	71000c1f 	cmp	w0, #0x3
  402090:	54fffea1 	b.ne	402064 <uart_send_thread+0x20>  // b.any
  402094:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402098:	91268000 	add	x0, x0, #0x9a0
  40209c:	94000052 	bl	4021e4 <uart485_send_to_dtu>
  4020a0:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4020a4:	91268000 	add	x0, x0, #0x9a0
  4020a8:	d2882242 	mov	x2, #0x4112                	// #16658
  4020ac:	52800001 	mov	w1, #0x0                   	// #0
  4020b0:	97fffb64 	bl	400e40 <memset@plt>
  4020b4:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4020b8:	91268000 	add	x0, x0, #0x9a0
  4020bc:	91401000 	add	x0, x0, #0x4, lsl #12
  4020c0:	3904401f 	strb	wzr, [x0, #272]
  4020c4:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4020c8:	91268000 	add	x0, x0, #0x9a0
  4020cc:	91401000 	add	x0, x0, #0x4, lsl #12
  4020d0:	3904441f 	strb	wzr, [x0, #273]
  4020d4:	17ffffe4 	b	402064 <uart_send_thread+0x20>

00000000004020d8 <uart_init>:
  4020d8:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4020dc:	910003fd 	mov	x29, sp
  4020e0:	b9002fa0 	str	w0, [x29, #44]
  4020e4:	b9002ba1 	str	w1, [x29, #40]
  4020e8:	b90027a2 	str	w2, [x29, #36]
  4020ec:	b90023a3 	str	w3, [x29, #32]
  4020f0:	39007fa4 	strb	w4, [x29, #31]
  4020f4:	f9000ba5 	str	x5, [x29, #16]
  4020f8:	f9400ba1 	ldr	x1, [x29, #16]
  4020fc:	b9402fa0 	ldr	w0, [x29, #44]
  402100:	97fffdcb 	bl	40182c <serial_open>
  402104:	f9400ba0 	ldr	x0, [x29, #16]
  402108:	b9400001 	ldr	w1, [x0]
  40210c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402110:	9127e000 	add	x0, x0, #0x9f8
  402114:	2a0103e2 	mov	w2, w1
  402118:	b9402fa1 	ldr	w1, [x29, #44]
  40211c:	97fffb95 	bl	400f70 <printf@plt>
  402120:	f9400ba0 	ldr	x0, [x29, #16]
  402124:	b9400000 	ldr	w0, [x0]
  402128:	b9402ba1 	ldr	w1, [x29, #40]
  40212c:	97fffe5c 	bl	401a9c <set_speed>
  402130:	f9400ba0 	ldr	x0, [x29, #16]
  402134:	b9400000 	ldr	w0, [x0]
  402138:	39407fa1 	ldrb	w1, [x29, #31]
  40213c:	2a0103e3 	mov	w3, w1
  402140:	b94023a2 	ldr	w2, [x29, #32]
  402144:	b94027a1 	ldr	w1, [x29, #36]
  402148:	97fffea7 	bl	401be4 <set_parity>
  40214c:	3100041f 	cmn	w0, #0x1
  402150:	540000c1 	b.ne	402168 <uart_init+0x90>  // b.any
  402154:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402158:	91284000 	add	x0, x0, #0xa10
  40215c:	97fffb15 	bl	400db0 <perror@plt>
  402160:	52800000 	mov	w0, #0x0                   	// #0
  402164:	97fffb0f 	bl	400da0 <exit@plt>
  402168:	52800000 	mov	w0, #0x0                   	// #0
  40216c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  402170:	d65f03c0 	ret

0000000000402174 <uart_exit>:
  402174:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  402178:	910003fd 	mov	x29, sp
  40217c:	b9001fa0 	str	w0, [x29, #28]
  402180:	b9401fa0 	ldr	w0, [x29, #28]
  402184:	97fffb37 	bl	400e60 <close@plt>
  402188:	d503201f 	nop
  40218c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  402190:	d65f03c0 	ret

0000000000402194 <uart485_send>:
  402194:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  402198:	910003fd 	mov	x29, sp
  40219c:	b9001fa0 	str	w0, [x29, #28]
  4021a0:	f9000ba1 	str	x1, [x29, #16]
  4021a4:	b9001ba2 	str	w2, [x29, #24]
  4021a8:	b9002fbf 	str	wzr, [x29, #44]
  4021ac:	b9801ba0 	ldrsw	x0, [x29, #24]
  4021b0:	aa0003e2 	mov	x2, x0
  4021b4:	f9400ba1 	ldr	x1, [x29, #16]
  4021b8:	b9401fa0 	ldr	w0, [x29, #28]
  4021bc:	97fffb39 	bl	400ea0 <write@plt>
  4021c0:	b9002fa0 	str	w0, [x29, #44]
  4021c4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4021c8:	9128a000 	add	x0, x0, #0xa28
  4021cc:	f9400ba2 	ldr	x2, [x29, #16]
  4021d0:	b9402fa1 	ldr	w1, [x29, #44]
  4021d4:	97fffb67 	bl	400f70 <printf@plt>
  4021d8:	d503201f 	nop
  4021dc:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4021e0:	d65f03c0 	ret

00000000004021e4 <uart485_send_to_dtu>:
  4021e4:	d2820810 	mov	x16, #0x1040                	// #4160
  4021e8:	cb3063ff 	sub	sp, sp, x16
  4021ec:	a9017bfd 	stp	x29, x30, [sp, #16]
  4021f0:	910043fd 	add	x29, sp, #0x10
  4021f4:	f90013f3 	str	x19, [sp, #32]
  4021f8:	f90017a0 	str	x0, [x29, #40]
  4021fc:	f94017a4 	ldr	x4, [x29, #40]
  402200:	f94017a0 	ldr	x0, [x29, #40]
  402204:	91020005 	add	x5, x0, #0x80
  402208:	f94017a1 	ldr	x1, [x29, #40]
  40220c:	d2822000 	mov	x0, #0x1100                	// #4352
  402210:	8b000026 	add	x6, x1, x0
  402214:	f94017a1 	ldr	x1, [x29, #40]
  402218:	d2862000 	mov	x0, #0x3100                	// #12544
  40221c:	8b000027 	add	x7, x1, x0
  402220:	f94017a1 	ldr	x1, [x29, #40]
  402224:	d2882000 	mov	x0, #0x4100                	// #16640
  402228:	8b000020 	add	x0, x1, x0
  40222c:	d0000081 	adrp	x1, 414000 <memcpy@GLIBC_2.17>
  402230:	91254023 	add	x3, x1, #0x950
  402234:	d0000081 	adrp	x1, 414000 <memcpy@GLIBC_2.17>
  402238:	9125c022 	add	x2, x1, #0x970
  40223c:	b0000001 	adrp	x1, 403000 <char_to_hex+0x90>
  402240:	9128e021 	add	x1, x1, #0xa38
  402244:	9100c3a8 	add	x8, x29, #0x30
  402248:	f90003e0 	str	x0, [sp]
  40224c:	aa0803e0 	mov	x0, x8
  402250:	97fffadc 	bl	400dc0 <sprintf@plt>
  402254:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402258:	91150000 	add	x0, x0, #0x540
  40225c:	b9400000 	ldr	w0, [x0]
  402260:	52800041 	mov	w1, #0x2                   	// #2
  402264:	97fffac7 	bl	400d80 <tcflush@plt>
  402268:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40226c:	91150000 	add	x0, x0, #0x540
  402270:	b9400013 	ldr	w19, [x0]
  402274:	9100c3a0 	add	x0, x29, #0x30
  402278:	97fffac6 	bl	400d90 <strlen@plt>
  40227c:	aa0003e1 	mov	x1, x0
  402280:	9100c3a0 	add	x0, x29, #0x30
  402284:	aa0103e2 	mov	x2, x1
  402288:	aa0003e1 	mov	x1, x0
  40228c:	2a1303e0 	mov	w0, w19
  402290:	97fffb04 	bl	400ea0 <write@plt>
  402294:	d503201f 	nop
  402298:	f94013f3 	ldr	x19, [sp, #32]
  40229c:	a9417bfd 	ldp	x29, x30, [sp, #16]
  4022a0:	d2820810 	mov	x16, #0x1040                	// #4160
  4022a4:	8b3063ff 	add	sp, sp, x16
  4022a8:	d65f03c0 	ret

00000000004022ac <config_6226>:
  4022ac:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  4022b0:	910003fd 	mov	x29, sp
  4022b4:	f9000bf3 	str	x19, [sp, #16]
  4022b8:	b9002fa0 	str	w0, [x29, #44]
  4022bc:	a903ffbf 	stp	xzr, xzr, [x29, #56]
  4022c0:	a904ffbf 	stp	xzr, xzr, [x29, #72]
  4022c4:	a905ffbf 	stp	xzr, xzr, [x29, #88]
  4022c8:	a906ffbf 	stp	xzr, xzr, [x29, #104]
  4022cc:	a907ffbf 	stp	xzr, xzr, [x29, #120]
  4022d0:	a908ffbf 	stp	xzr, xzr, [x29, #136]
  4022d4:	a909ffbf 	stp	xzr, xzr, [x29, #152]
  4022d8:	f90057bf 	str	xzr, [x29, #168]
  4022dc:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4022e0:	912a8000 	add	x0, x0, #0xaa0
  4022e4:	f9001fa0 	str	x0, [x29, #56]
  4022e8:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4022ec:	912b6000 	add	x0, x0, #0xad8
  4022f0:	f90023a0 	str	x0, [x29, #64]
  4022f4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4022f8:	912ba000 	add	x0, x0, #0xae8
  4022fc:	f90027a0 	str	x0, [x29, #72]
  402300:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402304:	912be000 	add	x0, x0, #0xaf8
  402308:	f9002ba0 	str	x0, [x29, #80]
  40230c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402310:	912c2000 	add	x0, x0, #0xb08
  402314:	f9002fa0 	str	x0, [x29, #88]
  402318:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40231c:	912c6000 	add	x0, x0, #0xb18
  402320:	f90033a0 	str	x0, [x29, #96]
  402324:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402328:	912ca000 	add	x0, x0, #0xb28
  40232c:	f90037a0 	str	x0, [x29, #104]
  402330:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402334:	912ce000 	add	x0, x0, #0xb38
  402338:	f9003ba0 	str	x0, [x29, #112]
  40233c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402340:	912d2000 	add	x0, x0, #0xb48
  402344:	f9003fa0 	str	x0, [x29, #120]
  402348:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40234c:	912d6000 	add	x0, x0, #0xb58
  402350:	f90043a0 	str	x0, [x29, #128]
  402354:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402358:	912da000 	add	x0, x0, #0xb68
  40235c:	f90047a0 	str	x0, [x29, #136]
  402360:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402364:	912de000 	add	x0, x0, #0xb78
  402368:	f9004ba0 	str	x0, [x29, #144]
  40236c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402370:	912e2000 	add	x0, x0, #0xb88
  402374:	f9004fa0 	str	x0, [x29, #152]
  402378:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40237c:	912e6000 	add	x0, x0, #0xb98
  402380:	f90053a0 	str	x0, [x29, #160]
  402384:	f9401fb3 	ldr	x19, [x29, #56]
  402388:	f9401fa0 	ldr	x0, [x29, #56]
  40238c:	97fffa81 	bl	400d90 <strlen@plt>
  402390:	aa0003e2 	mov	x2, x0
  402394:	aa1303e1 	mov	x1, x19
  402398:	b9402fa0 	ldr	w0, [x29, #44]
  40239c:	97fffac1 	bl	400ea0 <write@plt>
  4023a0:	f9400bf3 	ldr	x19, [sp, #16]
  4023a4:	a8cb7bfd 	ldp	x29, x30, [sp], #176
  4023a8:	d65f03c0 	ret

00000000004023ac <extract_data_ac>:
  4023ac:	d2820810 	mov	x16, #0x1040                	// #4160
  4023b0:	cb3063ff 	sub	sp, sp, x16
  4023b4:	a9007bfd 	stp	x29, x30, [sp]
  4023b8:	910003fd 	mov	x29, sp
  4023bc:	f9000bf3 	str	x19, [sp, #16]
  4023c0:	f90017a0 	str	x0, [x29, #40]
  4023c4:	b90027a1 	str	w1, [x29, #36]
  4023c8:	b9103bbf 	str	wzr, [x29, #4152]
  4023cc:	9100e3a0 	add	x0, x29, #0x38
  4023d0:	d2820001 	mov	x1, #0x1000                	// #4096
  4023d4:	aa0103e2 	mov	x2, x1
  4023d8:	52800001 	mov	w1, #0x0                   	// #0
  4023dc:	97fffa99 	bl	400e40 <memset@plt>
  4023e0:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4023e4:	91268000 	add	x0, x0, #0x9a0
  4023e8:	91401000 	add	x0, x0, #0x4, lsl #12
  4023ec:	3904401f 	strb	wzr, [x0, #272]
  4023f0:	b9103fbf 	str	wzr, [x29, #4156]
  4023f4:	14000026 	b	40248c <extract_data_ac+0xe0>
  4023f8:	b9903fa0 	ldrsw	x0, [x29, #4156]
  4023fc:	f94017a1 	ldr	x1, [x29, #40]
  402400:	8b000020 	add	x0, x1, x0
  402404:	39400000 	ldrb	w0, [x0]
  402408:	7100901f 	cmp	w0, #0x24
  40240c:	54000141 	b.ne	402434 <extract_data_ac+0x88>  // b.any
  402410:	b9903fa0 	ldrsw	x0, [x29, #4156]
  402414:	91000400 	add	x0, x0, #0x1
  402418:	f94017a1 	ldr	x1, [x29, #40]
  40241c:	8b000020 	add	x0, x1, x0
  402420:	39400000 	ldrb	w0, [x0]
  402424:	71011c1f 	cmp	w0, #0x47
  402428:	54000061 	b.ne	402434 <extract_data_ac+0x88>  // b.any
  40242c:	52800020 	mov	w0, #0x1                   	// #1
  402430:	b9103ba0 	str	w0, [x29, #4152]
  402434:	b9503ba0 	ldr	w0, [x29, #4152]
  402438:	7100041f 	cmp	w0, #0x1
  40243c:	54000221 	b.ne	402480 <extract_data_ac+0xd4>  // b.any
  402440:	b9903fa0 	ldrsw	x0, [x29, #4156]
  402444:	f94017a1 	ldr	x1, [x29, #40]
  402448:	8b000020 	add	x0, x1, x0
  40244c:	39400000 	ldrb	w0, [x0]
  402450:	7100341f 	cmp	w0, #0xd
  402454:	54000161 	b.ne	402480 <extract_data_ac+0xd4>  // b.any
  402458:	b9903fa0 	ldrsw	x0, [x29, #4156]
  40245c:	91000400 	add	x0, x0, #0x1
  402460:	f94017a1 	ldr	x1, [x29, #40]
  402464:	8b000020 	add	x0, x1, x0
  402468:	39400000 	ldrb	w0, [x0]
  40246c:	7100281f 	cmp	w0, #0xa
  402470:	54000081 	b.ne	402480 <extract_data_ac+0xd4>  // b.any
  402474:	52800040 	mov	w0, #0x2                   	// #2
  402478:	b9103ba0 	str	w0, [x29, #4152]
  40247c:	14000008 	b	40249c <extract_data_ac+0xf0>
  402480:	b9503fa0 	ldr	w0, [x29, #4156]
  402484:	11000400 	add	w0, w0, #0x1
  402488:	b9103fa0 	str	w0, [x29, #4156]
  40248c:	b9503fa1 	ldr	w1, [x29, #4156]
  402490:	b94027a0 	ldr	w0, [x29, #36]
  402494:	6b00003f 	cmp	w1, w0
  402498:	54fffb0b 	b.lt	4023f8 <extract_data_ac+0x4c>  // b.tstop
  40249c:	b9503ba0 	ldr	w0, [x29, #4152]
  4024a0:	7100081f 	cmp	w0, #0x2
  4024a4:	54000b21 	b.ne	402608 <extract_data_ac+0x25c>  // b.any
  4024a8:	b9503fa0 	ldr	w0, [x29, #4156]
  4024ac:	11002000 	add	w0, w0, #0x8
  4024b0:	b94027a1 	ldr	w1, [x29, #36]
  4024b4:	6b00003f 	cmp	w1, w0
  4024b8:	54000a8d 	b.le	402608 <extract_data_ac+0x25c>
  4024bc:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4024c0:	91268000 	add	x0, x0, #0x9a0
  4024c4:	d2801002 	mov	x2, #0x80                  	// #128
  4024c8:	52800001 	mov	w1, #0x0                   	// #0
  4024cc:	97fffa5d 	bl	400e40 <memset@plt>
  4024d0:	b9903fa1 	ldrsw	x1, [x29, #4156]
  4024d4:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4024d8:	91268000 	add	x0, x0, #0x9a0
  4024dc:	aa0103e2 	mov	x2, x1
  4024e0:	f94017a1 	ldr	x1, [x29, #40]
  4024e4:	97fffa23 	bl	400d70 <memcpy@plt>
  4024e8:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4024ec:	91268000 	add	x0, x0, #0x9a0
  4024f0:	91401000 	add	x0, x0, #0x4, lsl #12
  4024f4:	39444000 	ldrb	w0, [x0, #272]
  4024f8:	32000000 	orr	w0, w0, #0x1
  4024fc:	12001c01 	and	w1, w0, #0xff
  402500:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402504:	91268000 	add	x0, x0, #0x9a0
  402508:	91401000 	add	x0, x0, #0x4, lsl #12
  40250c:	39044001 	strb	w1, [x0, #272]
  402510:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402514:	91268000 	add	x0, x0, #0x9a0
  402518:	91401000 	add	x0, x0, #0x4, lsl #12
  40251c:	39444000 	ldrb	w0, [x0, #272]
  402520:	2a0003e3 	mov	w3, w0
  402524:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402528:	91268001 	add	x1, x0, #0x9a0
  40252c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402530:	912ea000 	add	x0, x0, #0xba8
  402534:	aa0103e2 	mov	x2, x1
  402538:	2a0303e1 	mov	w1, w3
  40253c:	97fffa8d 	bl	400f70 <printf@plt>
  402540:	f0000080 	adrp	x0, 415000 <pk+0x660>
  402544:	912a8000 	add	x0, x0, #0xaa0
  402548:	d2820002 	mov	x2, #0x1000                	// #4096
  40254c:	52800001 	mov	w1, #0x0                   	// #0
  402550:	97fffa3c 	bl	400e40 <memset@plt>
  402554:	b9903fa0 	ldrsw	x0, [x29, #4156]
  402558:	91000800 	add	x0, x0, #0x2
  40255c:	f94017a1 	ldr	x1, [x29, #40]
  402560:	8b000023 	add	x3, x1, x0
  402564:	b94027a1 	ldr	w1, [x29, #36]
  402568:	b9503fa0 	ldr	w0, [x29, #4156]
  40256c:	4b000020 	sub	w0, w1, w0
  402570:	51000801 	sub	w1, w0, #0x2
  402574:	9100e3a0 	add	x0, x29, #0x38
  402578:	2a0103e2 	mov	w2, w1
  40257c:	aa0303e1 	mov	x1, x3
  402580:	940002f7 	bl	40315c <hex_to_char>
  402584:	9100e3a0 	add	x0, x29, #0x38
  402588:	97fffa02 	bl	400d90 <strlen@plt>
  40258c:	aa0003e2 	mov	x2, x0
  402590:	9100e3a1 	add	x1, x29, #0x38
  402594:	f0000080 	adrp	x0, 415000 <pk+0x660>
  402598:	912a8000 	add	x0, x0, #0xaa0
  40259c:	97fffa71 	bl	400f60 <strncpy@plt>
  4025a0:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4025a4:	91268000 	add	x0, x0, #0x9a0
  4025a8:	91401000 	add	x0, x0, #0x4, lsl #12
  4025ac:	39444000 	ldrb	w0, [x0, #272]
  4025b0:	321f0000 	orr	w0, w0, #0x2
  4025b4:	12001c01 	and	w1, w0, #0xff
  4025b8:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4025bc:	91268000 	add	x0, x0, #0x9a0
  4025c0:	91401000 	add	x0, x0, #0x4, lsl #12
  4025c4:	39044001 	strb	w1, [x0, #272]
  4025c8:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4025cc:	91268000 	add	x0, x0, #0x9a0
  4025d0:	91401000 	add	x0, x0, #0x4, lsl #12
  4025d4:	39444000 	ldrb	w0, [x0, #272]
  4025d8:	2a0003f3 	mov	w19, w0
  4025dc:	f0000080 	adrp	x0, 415000 <pk+0x660>
  4025e0:	912a8000 	add	x0, x0, #0xaa0
  4025e4:	97fff9eb 	bl	400d90 <strlen@plt>
  4025e8:	aa0003e2 	mov	x2, x0
  4025ec:	f0000080 	adrp	x0, 415000 <pk+0x660>
  4025f0:	912a8001 	add	x1, x0, #0xaa0
  4025f4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4025f8:	912f0000 	add	x0, x0, #0xbc0
  4025fc:	aa0103e3 	mov	x3, x1
  402600:	2a1303e1 	mov	w1, w19
  402604:	97fffa5b 	bl	400f70 <printf@plt>
  402608:	d503201f 	nop
  40260c:	f9400bf3 	ldr	x19, [sp, #16]
  402610:	a9407bfd 	ldp	x29, x30, [sp]
  402614:	d2820810 	mov	x16, #0x1040                	// #4160
  402618:	8b3063ff 	add	sp, sp, x16
  40261c:	d65f03c0 	ret

0000000000402620 <extract_bd>:
  402620:	d2820610 	mov	x16, #0x1030                	// #4144
  402624:	cb3063ff 	sub	sp, sp, x16
  402628:	a9007bfd 	stp	x29, x30, [sp]
  40262c:	910003fd 	mov	x29, sp
  402630:	f9000fa0 	str	x0, [x29, #24]
  402634:	b90017a1 	str	w1, [x29, #20]
  402638:	b9102bbf 	str	wzr, [x29, #4136]
  40263c:	9100a3a0 	add	x0, x29, #0x28
  402640:	d2820001 	mov	x1, #0x1000                	// #4096
  402644:	aa0103e2 	mov	x2, x1
  402648:	52800001 	mov	w1, #0x0                   	// #0
  40264c:	97fff9fd 	bl	400e40 <memset@plt>
  402650:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402654:	91268000 	add	x0, x0, #0x9a0
  402658:	91401000 	add	x0, x0, #0x4, lsl #12
  40265c:	3904441f 	strb	wzr, [x0, #273]
  402660:	b9102fbf 	str	wzr, [x29, #4140]
  402664:	14000026 	b	4026fc <extract_bd+0xdc>
  402668:	b9902fa0 	ldrsw	x0, [x29, #4140]
  40266c:	f9400fa1 	ldr	x1, [x29, #24]
  402670:	8b000020 	add	x0, x1, x0
  402674:	39400000 	ldrb	w0, [x0]
  402678:	7100901f 	cmp	w0, #0x24
  40267c:	54000141 	b.ne	4026a4 <extract_bd+0x84>  // b.any
  402680:	b9902fa0 	ldrsw	x0, [x29, #4140]
  402684:	91000400 	add	x0, x0, #0x1
  402688:	f9400fa1 	ldr	x1, [x29, #24]
  40268c:	8b000020 	add	x0, x1, x0
  402690:	39400000 	ldrb	w0, [x0]
  402694:	71011c1f 	cmp	w0, #0x47
  402698:	54000061 	b.ne	4026a4 <extract_bd+0x84>  // b.any
  40269c:	52800020 	mov	w0, #0x1                   	// #1
  4026a0:	b9102ba0 	str	w0, [x29, #4136]
  4026a4:	b9502ba0 	ldr	w0, [x29, #4136]
  4026a8:	7100041f 	cmp	w0, #0x1
  4026ac:	54000221 	b.ne	4026f0 <extract_bd+0xd0>  // b.any
  4026b0:	b9902fa0 	ldrsw	x0, [x29, #4140]
  4026b4:	f9400fa1 	ldr	x1, [x29, #24]
  4026b8:	8b000020 	add	x0, x1, x0
  4026bc:	39400000 	ldrb	w0, [x0]
  4026c0:	7100341f 	cmp	w0, #0xd
  4026c4:	54000161 	b.ne	4026f0 <extract_bd+0xd0>  // b.any
  4026c8:	b9902fa0 	ldrsw	x0, [x29, #4140]
  4026cc:	91000400 	add	x0, x0, #0x1
  4026d0:	f9400fa1 	ldr	x1, [x29, #24]
  4026d4:	8b000020 	add	x0, x1, x0
  4026d8:	39400000 	ldrb	w0, [x0]
  4026dc:	7100281f 	cmp	w0, #0xa
  4026e0:	54000081 	b.ne	4026f0 <extract_bd+0xd0>  // b.any
  4026e4:	52800040 	mov	w0, #0x2                   	// #2
  4026e8:	b9102ba0 	str	w0, [x29, #4136]
  4026ec:	14000008 	b	40270c <extract_bd+0xec>
  4026f0:	b9502fa0 	ldr	w0, [x29, #4140]
  4026f4:	11000400 	add	w0, w0, #0x1
  4026f8:	b9102fa0 	str	w0, [x29, #4140]
  4026fc:	b9502fa1 	ldr	w1, [x29, #4140]
  402700:	b94017a0 	ldr	w0, [x29, #20]
  402704:	6b00003f 	cmp	w1, w0
  402708:	54fffb0b 	b.lt	402668 <extract_bd+0x48>  // b.tstop
  40270c:	b9502ba0 	ldr	w0, [x29, #4136]
  402710:	7100081f 	cmp	w0, #0x2
  402714:	540007a1 	b.ne	402808 <extract_bd+0x1e8>  // b.any
  402718:	b9502fa0 	ldr	w0, [x29, #4140]
  40271c:	11002000 	add	w0, w0, #0x8
  402720:	b94017a1 	ldr	w1, [x29, #20]
  402724:	6b00003f 	cmp	w1, w0
  402728:	5400070d 	b.le	402808 <extract_bd+0x1e8>
  40272c:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402730:	91288000 	add	x0, x0, #0xa20
  402734:	d2801002 	mov	x2, #0x80                  	// #128
  402738:	52800001 	mov	w1, #0x0                   	// #0
  40273c:	97fff9c1 	bl	400e40 <memset@plt>
  402740:	b9902fa1 	ldrsw	x1, [x29, #4140]
  402744:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402748:	91288000 	add	x0, x0, #0xa20
  40274c:	aa0103e2 	mov	x2, x1
  402750:	f9400fa1 	ldr	x1, [x29, #24]
  402754:	97fff987 	bl	400d70 <memcpy@plt>
  402758:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  40275c:	91268000 	add	x0, x0, #0x9a0
  402760:	91401000 	add	x0, x0, #0x4, lsl #12
  402764:	39444400 	ldrb	w0, [x0, #273]
  402768:	32000000 	orr	w0, w0, #0x1
  40276c:	12001c01 	and	w1, w0, #0xff
  402770:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402774:	91268000 	add	x0, x0, #0x9a0
  402778:	91401000 	add	x0, x0, #0x4, lsl #12
  40277c:	39044401 	strb	w1, [x0, #273]
  402780:	b00000a0 	adrp	x0, 417000 <pk+0x2660>
  402784:	912a8000 	add	x0, x0, #0xaa0
  402788:	d2820002 	mov	x2, #0x1000                	// #4096
  40278c:	52800001 	mov	w1, #0x0                   	// #0
  402790:	97fff9ac 	bl	400e40 <memset@plt>
  402794:	b9902fa0 	ldrsw	x0, [x29, #4140]
  402798:	91000800 	add	x0, x0, #0x2
  40279c:	f9400fa1 	ldr	x1, [x29, #24]
  4027a0:	8b000023 	add	x3, x1, x0
  4027a4:	b94017a1 	ldr	w1, [x29, #20]
  4027a8:	b9502fa0 	ldr	w0, [x29, #4140]
  4027ac:	4b000020 	sub	w0, w1, w0
  4027b0:	51000801 	sub	w1, w0, #0x2
  4027b4:	9100a3a0 	add	x0, x29, #0x28
  4027b8:	2a0103e2 	mov	w2, w1
  4027bc:	aa0303e1 	mov	x1, x3
  4027c0:	94000267 	bl	40315c <hex_to_char>
  4027c4:	9100a3a0 	add	x0, x29, #0x28
  4027c8:	97fff972 	bl	400d90 <strlen@plt>
  4027cc:	aa0003e2 	mov	x2, x0
  4027d0:	9100a3a1 	add	x1, x29, #0x28
  4027d4:	b00000a0 	adrp	x0, 417000 <pk+0x2660>
  4027d8:	912a8000 	add	x0, x0, #0xaa0
  4027dc:	97fff9e1 	bl	400f60 <strncpy@plt>
  4027e0:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4027e4:	91268000 	add	x0, x0, #0x9a0
  4027e8:	91401000 	add	x0, x0, #0x4, lsl #12
  4027ec:	39444400 	ldrb	w0, [x0, #273]
  4027f0:	321f0000 	orr	w0, w0, #0x2
  4027f4:	12001c01 	and	w1, w0, #0xff
  4027f8:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4027fc:	91268000 	add	x0, x0, #0x9a0
  402800:	91401000 	add	x0, x0, #0x4, lsl #12
  402804:	39044401 	strb	w1, [x0, #273]
  402808:	d503201f 	nop
  40280c:	a9407bfd 	ldp	x29, x30, [sp]
  402810:	d2820610 	mov	x16, #0x1030                	// #4144
  402814:	8b3063ff 	add	sp, sp, x16
  402818:	d65f03c0 	ret

000000000040281c <init_pm>:
  40281c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  402820:	910003fd 	mov	x29, sp
  402824:	12800000 	mov	w0, #0xffffffff            	// #-1
  402828:	b9001fa0 	str	w0, [x29, #28]
  40282c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402830:	912f6000 	add	x0, x0, #0xbd8
  402834:	9400002a 	bl	4028dc <file_open>
  402838:	b9001fa0 	str	w0, [x29, #28]
  40283c:	b9401fa0 	ldr	w0, [x29, #28]
  402840:	7100001f 	cmp	w0, #0x0
  402844:	5400006a 	b.ge	402850 <init_pm+0x34>  // b.tcont
  402848:	12800000 	mov	w0, #0xffffffff            	// #-1
  40284c:	14000022 	b	4028d4 <init_pm+0xb8>
  402850:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402854:	9114f000 	add	x0, x0, #0x53c
  402858:	b9400000 	ldr	w0, [x0]
  40285c:	7100081f 	cmp	w0, #0x2
  402860:	5400024d 	b.le	4028a8 <init_pm+0x8c>
  402864:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402868:	9132e002 	add	x2, x0, #0xcb8
  40286c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402870:	912fe001 	add	x1, x0, #0xbf8
  402874:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402878:	91300000 	add	x0, x0, #0xc00
  40287c:	52800364 	mov	w4, #0x1b                  	// #27
  402880:	aa0203e3 	mov	x3, x2
  402884:	aa0103e2 	mov	x2, x1
  402888:	52800061 	mov	w1, #0x3                   	// #3
  40288c:	97fff9b9 	bl	400f70 <printf@plt>
  402890:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402894:	9130e000 	add	x0, x0, #0xc38
  402898:	b9401fa1 	ldr	w1, [x29, #28]
  40289c:	97fff9b5 	bl	400f70 <printf@plt>
  4028a0:	52800140 	mov	w0, #0xa                   	// #10
  4028a4:	97fff9bf 	bl	400fa0 <putchar@plt>
  4028a8:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4028ac:	91264000 	add	x0, x0, #0x990
  4028b0:	b9401fa1 	ldr	w1, [x29, #28]
  4028b4:	b9000001 	str	w1, [x0]
  4028b8:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4028bc:	91264000 	add	x0, x0, #0x990
  4028c0:	b900041f 	str	wzr, [x0, #4]
  4028c4:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4028c8:	91264000 	add	x0, x0, #0x990
  4028cc:	b900081f 	str	wzr, [x0, #8]
  4028d0:	52800000 	mov	w0, #0x0                   	// #0
  4028d4:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4028d8:	d65f03c0 	ret

00000000004028dc <file_open>:
  4028dc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4028e0:	910003fd 	mov	x29, sp
  4028e4:	f9000fa0 	str	x0, [x29, #24]
  4028e8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4028ec:	b9002fa0 	str	w0, [x29, #44]
  4028f0:	f9400fa0 	ldr	x0, [x29, #24]
  4028f4:	f100001f 	cmp	x0, #0x0
  4028f8:	54000141 	b.ne	402920 <file_open+0x44>  // b.any
  4028fc:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402900:	91330002 	add	x2, x0, #0xcc0
  402904:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402908:	912fe001 	add	x1, x0, #0xbf8
  40290c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402910:	91312000 	add	x0, x0, #0xc48
  402914:	aa0203e3 	mov	x3, x2
  402918:	52800502 	mov	w2, #0x28                  	// #40
  40291c:	97fff999 	bl	400f80 <__assert_fail@plt>
  402920:	f9400fa0 	ldr	x0, [x29, #24]
  402924:	f100001f 	cmp	x0, #0x0
  402928:	54000301 	b.ne	402988 <file_open+0xac>  // b.any
  40292c:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402930:	9114f000 	add	x0, x0, #0x53c
  402934:	b9400000 	ldr	w0, [x0]
  402938:	7100001f 	cmp	w0, #0x0
  40293c:	5400022d 	b.le	402980 <file_open+0xa4>
  402940:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402944:	91334002 	add	x2, x0, #0xcd0
  402948:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40294c:	912fe001 	add	x1, x0, #0xbf8
  402950:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402954:	91300000 	add	x0, x0, #0xc00
  402958:	52800564 	mov	w4, #0x2b                  	// #43
  40295c:	aa0203e3 	mov	x3, x2
  402960:	aa0103e2 	mov	x2, x1
  402964:	52800021 	mov	w1, #0x1                   	// #1
  402968:	97fff982 	bl	400f70 <printf@plt>
  40296c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402970:	91316000 	add	x0, x0, #0xc58
  402974:	97fff97f 	bl	400f70 <printf@plt>
  402978:	52800140 	mov	w0, #0xa                   	// #10
  40297c:	97fff989 	bl	400fa0 <putchar@plt>
  402980:	12800000 	mov	w0, #0xffffffff            	// #-1
  402984:	14000022 	b	402a0c <file_open+0x130>
  402988:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40298c:	912f6000 	add	x0, x0, #0xbd8
  402990:	52803002 	mov	w2, #0x180                 	// #384
  402994:	52818841 	mov	w1, #0xc42                 	// #3138
  402998:	97fff922 	bl	400e20 <open@plt>
  40299c:	b9002fa0 	str	w0, [x29, #44]
  4029a0:	b9402fa0 	ldr	w0, [x29, #44]
  4029a4:	7100001f 	cmp	w0, #0x0
  4029a8:	5400030a 	b.ge	402a08 <file_open+0x12c>  // b.tcont
  4029ac:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  4029b0:	9114f000 	add	x0, x0, #0x53c
  4029b4:	b9400000 	ldr	w0, [x0]
  4029b8:	7100001f 	cmp	w0, #0x0
  4029bc:	5400022d 	b.le	402a00 <file_open+0x124>
  4029c0:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4029c4:	91334002 	add	x2, x0, #0xcd0
  4029c8:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4029cc:	912fe001 	add	x1, x0, #0xbf8
  4029d0:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4029d4:	91300000 	add	x0, x0, #0xc00
  4029d8:	52800624 	mov	w4, #0x31                  	// #49
  4029dc:	aa0203e3 	mov	x3, x2
  4029e0:	aa0103e2 	mov	x2, x1
  4029e4:	52800021 	mov	w1, #0x1                   	// #1
  4029e8:	97fff962 	bl	400f70 <printf@plt>
  4029ec:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  4029f0:	9131c000 	add	x0, x0, #0xc70
  4029f4:	97fff95f 	bl	400f70 <printf@plt>
  4029f8:	52800140 	mov	w0, #0xa                   	// #10
  4029fc:	97fff969 	bl	400fa0 <putchar@plt>
  402a00:	12800000 	mov	w0, #0xffffffff            	// #-1
  402a04:	14000002 	b	402a0c <file_open+0x130>
  402a08:	b9402fa0 	ldr	w0, [x29, #44]
  402a0c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  402a10:	d65f03c0 	ret

0000000000402a14 <write_file>:
  402a14:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  402a18:	910003fd 	mov	x29, sp
  402a1c:	b9002fa0 	str	w0, [x29, #44]
  402a20:	f90013a1 	str	x1, [x29, #32]
  402a24:	f9000fa2 	str	x2, [x29, #24]
  402a28:	12800000 	mov	w0, #0xffffffff            	// #-1
  402a2c:	b9003fa0 	str	w0, [x29, #60]
  402a30:	d0000080 	adrp	x0, 414000 <memcpy@GLIBC_2.17>
  402a34:	9114f000 	add	x0, x0, #0x53c
  402a38:	b9400000 	ldr	w0, [x0]
  402a3c:	71000c1f 	cmp	w0, #0x3
  402a40:	5400024d 	b.le	402a88 <write_file+0x74>
  402a44:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402a48:	91338002 	add	x2, x0, #0xce0
  402a4c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402a50:	912fe001 	add	x1, x0, #0xbf8
  402a54:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402a58:	91300000 	add	x0, x0, #0xc00
  402a5c:	52800784 	mov	w4, #0x3c                  	// #60
  402a60:	aa0203e3 	mov	x3, x2
  402a64:	aa0103e2 	mov	x2, x1
  402a68:	52800081 	mov	w1, #0x4                   	// #4
  402a6c:	97fff941 	bl	400f70 <printf@plt>
  402a70:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402a74:	9130e000 	add	x0, x0, #0xc38
  402a78:	b9402fa1 	ldr	w1, [x29, #44]
  402a7c:	97fff93d 	bl	400f70 <printf@plt>
  402a80:	52800140 	mov	w0, #0xa                   	// #10
  402a84:	97fff947 	bl	400fa0 <putchar@plt>
  402a88:	b9402fa0 	ldr	w0, [x29, #44]
  402a8c:	7100001f 	cmp	w0, #0x0
  402a90:	5400014a 	b.ge	402ab8 <write_file+0xa4>  // b.tcont
  402a94:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402a98:	9133c002 	add	x2, x0, #0xcf0
  402a9c:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402aa0:	912fe001 	add	x1, x0, #0xbf8
  402aa4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402aa8:	91320000 	add	x0, x0, #0xc80
  402aac:	aa0203e3 	mov	x3, x2
  402ab0:	528007c2 	mov	w2, #0x3e                  	// #62
  402ab4:	97fff933 	bl	400f80 <__assert_fail@plt>
  402ab8:	f94013a0 	ldr	x0, [x29, #32]
  402abc:	f100001f 	cmp	x0, #0x0
  402ac0:	54000141 	b.ne	402ae8 <write_file+0xd4>  // b.any
  402ac4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402ac8:	9133c002 	add	x2, x0, #0xcf0
  402acc:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402ad0:	912fe001 	add	x1, x0, #0xbf8
  402ad4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402ad8:	91324000 	add	x0, x0, #0xc90
  402adc:	aa0203e3 	mov	x3, x2
  402ae0:	528007e2 	mov	w2, #0x3f                  	// #63
  402ae4:	97fff927 	bl	400f80 <__assert_fail@plt>
  402ae8:	f9400fa0 	ldr	x0, [x29, #24]
  402aec:	f100001f 	cmp	x0, #0x0
  402af0:	54000141 	b.ne	402b18 <write_file+0x104>  // b.any
  402af4:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402af8:	9133c002 	add	x2, x0, #0xcf0
  402afc:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402b00:	912fe001 	add	x1, x0, #0xbf8
  402b04:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402b08:	91328000 	add	x0, x0, #0xca0
  402b0c:	aa0203e3 	mov	x3, x2
  402b10:	52800802 	mov	w2, #0x40                  	// #64
  402b14:	97fff91b 	bl	400f80 <__assert_fail@plt>
  402b18:	f9400fa2 	ldr	x2, [x29, #24]
  402b1c:	f94013a1 	ldr	x1, [x29, #32]
  402b20:	b9402fa0 	ldr	w0, [x29, #44]
  402b24:	97fff8df 	bl	400ea0 <write@plt>
  402b28:	b9003fa0 	str	w0, [x29, #60]
  402b2c:	b9403fa0 	ldr	w0, [x29, #60]
  402b30:	a8c47bfd 	ldp	x29, x30, [sp], #64
  402b34:	d65f03c0 	ret

0000000000402b38 <close_file>:
  402b38:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  402b3c:	910003fd 	mov	x29, sp
  402b40:	b9001fa0 	str	w0, [x29, #28]
  402b44:	b9401fa0 	ldr	w0, [x29, #28]
  402b48:	7100001f 	cmp	w0, #0x0
  402b4c:	5400014b 	b.lt	402b74 <close_file+0x3c>  // b.tstop
  402b50:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402b54:	91340002 	add	x2, x0, #0xd00
  402b58:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402b5c:	912fe001 	add	x1, x0, #0xbf8
  402b60:	b0000000 	adrp	x0, 403000 <char_to_hex+0x90>
  402b64:	9132c000 	add	x0, x0, #0xcb0
  402b68:	aa0203e3 	mov	x3, x2
  402b6c:	52800922 	mov	w2, #0x49                  	// #73
  402b70:	97fff904 	bl	400f80 <__assert_fail@plt>
  402b74:	b9401fa0 	ldr	w0, [x29, #28]
  402b78:	97fff8ba 	bl	400e60 <close@plt>
  402b7c:	d503201f 	nop
  402b80:	a8c27bfd 	ldp	x29, x30, [sp], #32
  402b84:	d65f03c0 	ret

0000000000402b88 <receive_data_analy>:
  402b88:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  402b8c:	910003fd 	mov	x29, sp
  402b90:	b9001fa0 	str	w0, [x29, #28]
  402b94:	f9000ba1 	str	x1, [x29, #16]
  402b98:	b9401fa1 	ldr	w1, [x29, #28]
  402b9c:	f9400ba0 	ldr	x0, [x29, #16]
  402ba0:	97fffe03 	bl	4023ac <extract_data_ac>
  402ba4:	52800000 	mov	w0, #0x0                   	// #0
  402ba8:	a8c27bfd 	ldp	x29, x30, [sp], #32
  402bac:	d65f03c0 	ret

0000000000402bb0 <receive_data_analy_bd>:
  402bb0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  402bb4:	910003fd 	mov	x29, sp
  402bb8:	b9001fa0 	str	w0, [x29, #28]
  402bbc:	f9000ba1 	str	x1, [x29, #16]
  402bc0:	b9401fa1 	ldr	w1, [x29, #28]
  402bc4:	f9400ba0 	ldr	x0, [x29, #16]
  402bc8:	97fffe96 	bl	402620 <extract_bd>
  402bcc:	52800000 	mov	w0, #0x0                   	// #0
  402bd0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  402bd4:	d65f03c0 	ret

0000000000402bd8 <str_to_hex>:
  402bd8:	d100c3ff 	sub	sp, sp, #0x30
  402bdc:	f9000fe0 	str	x0, [sp, #24]
  402be0:	f9000be1 	str	x1, [sp, #16]
  402be4:	b9000fe2 	str	w2, [sp, #12]
  402be8:	b9002bff 	str	wzr, [sp, #40]
  402bec:	39009fff 	strb	wzr, [sp, #39]
  402bf0:	b9002fff 	str	wzr, [sp, #44]
  402bf4:	b9002bff 	str	wzr, [sp, #40]
  402bf8:	140000d7 	b	402f54 <str_to_hex+0x37c>
  402bfc:	b9802fe0 	ldrsw	x0, [sp, #44]
  402c00:	f9400be1 	ldr	x1, [sp, #16]
  402c04:	8b000020 	add	x0, x1, x0
  402c08:	39400000 	ldrb	w0, [x0]
  402c0c:	7100dc1f 	cmp	w0, #0x37
  402c10:	54000760 	b.eq	402cfc <str_to_hex+0x124>  // b.none
  402c14:	7100dc1f 	cmp	w0, #0x37
  402c18:	5400022c 	b.gt	402c5c <str_to_hex+0x84>
  402c1c:	7100cc1f 	cmp	w0, #0x33
  402c20:	54000560 	b.eq	402ccc <str_to_hex+0xf4>  // b.none
  402c24:	7100cc1f 	cmp	w0, #0x33
  402c28:	5400010c 	b.gt	402c48 <str_to_hex+0x70>
  402c2c:	7100c41f 	cmp	w0, #0x31
  402c30:	54000420 	b.eq	402cb4 <str_to_hex+0xdc>  // b.none
  402c34:	7100c41f 	cmp	w0, #0x31
  402c38:	5400044c 	b.gt	402cc0 <str_to_hex+0xe8>
  402c3c:	7100c01f 	cmp	w0, #0x30
  402c40:	54000360 	b.eq	402cac <str_to_hex+0xd4>  // b.none
  402c44:	14000049 	b	402d68 <str_to_hex+0x190>
  402c48:	7100d41f 	cmp	w0, #0x35
  402c4c:	540004c0 	b.eq	402ce4 <str_to_hex+0x10c>  // b.none
  402c50:	7100d41f 	cmp	w0, #0x35
  402c54:	540004ec 	b.gt	402cf0 <str_to_hex+0x118>
  402c58:	14000020 	b	402cd8 <str_to_hex+0x100>
  402c5c:	7101081f 	cmp	w0, #0x42
  402c60:	54000660 	b.eq	402d2c <str_to_hex+0x154>  // b.none
  402c64:	7101081f 	cmp	w0, #0x42
  402c68:	5400010c 	b.gt	402c88 <str_to_hex+0xb0>
  402c6c:	7100e41f 	cmp	w0, #0x39
  402c70:	54000520 	b.eq	402d14 <str_to_hex+0x13c>  // b.none
  402c74:	7100e41f 	cmp	w0, #0x39
  402c78:	5400048b 	b.lt	402d08 <str_to_hex+0x130>  // b.tstop
  402c7c:	7101041f 	cmp	w0, #0x41
  402c80:	54000500 	b.eq	402d20 <str_to_hex+0x148>  // b.none
  402c84:	14000039 	b	402d68 <str_to_hex+0x190>
  402c88:	7101101f 	cmp	w0, #0x44
  402c8c:	540005c0 	b.eq	402d44 <str_to_hex+0x16c>  // b.none
  402c90:	7101101f 	cmp	w0, #0x44
  402c94:	5400052b 	b.lt	402d38 <str_to_hex+0x160>  // b.tstop
  402c98:	7101141f 	cmp	w0, #0x45
  402c9c:	540005a0 	b.eq	402d50 <str_to_hex+0x178>  // b.none
  402ca0:	7101181f 	cmp	w0, #0x46
  402ca4:	540005c0 	b.eq	402d5c <str_to_hex+0x184>  // b.none
  402ca8:	14000030 	b	402d68 <str_to_hex+0x190>
  402cac:	39009fff 	strb	wzr, [sp, #39]
  402cb0:	1400002e 	b	402d68 <str_to_hex+0x190>
  402cb4:	52800200 	mov	w0, #0x10                  	// #16
  402cb8:	39009fe0 	strb	w0, [sp, #39]
  402cbc:	1400002b 	b	402d68 <str_to_hex+0x190>
  402cc0:	52800400 	mov	w0, #0x20                  	// #32
  402cc4:	39009fe0 	strb	w0, [sp, #39]
  402cc8:	14000028 	b	402d68 <str_to_hex+0x190>
  402ccc:	52800600 	mov	w0, #0x30                  	// #48
  402cd0:	39009fe0 	strb	w0, [sp, #39]
  402cd4:	14000025 	b	402d68 <str_to_hex+0x190>
  402cd8:	52800800 	mov	w0, #0x40                  	// #64
  402cdc:	39009fe0 	strb	w0, [sp, #39]
  402ce0:	14000022 	b	402d68 <str_to_hex+0x190>
  402ce4:	52800a00 	mov	w0, #0x50                  	// #80
  402ce8:	39009fe0 	strb	w0, [sp, #39]
  402cec:	1400001f 	b	402d68 <str_to_hex+0x190>
  402cf0:	52800c00 	mov	w0, #0x60                  	// #96
  402cf4:	39009fe0 	strb	w0, [sp, #39]
  402cf8:	1400001c 	b	402d68 <str_to_hex+0x190>
  402cfc:	52800e00 	mov	w0, #0x70                  	// #112
  402d00:	39009fe0 	strb	w0, [sp, #39]
  402d04:	14000019 	b	402d68 <str_to_hex+0x190>
  402d08:	12800fe0 	mov	w0, #0xffffff80            	// #-128
  402d0c:	39009fe0 	strb	w0, [sp, #39]
  402d10:	14000016 	b	402d68 <str_to_hex+0x190>
  402d14:	12800de0 	mov	w0, #0xffffff90            	// #-112
  402d18:	39009fe0 	strb	w0, [sp, #39]
  402d1c:	14000013 	b	402d68 <str_to_hex+0x190>
  402d20:	12800be0 	mov	w0, #0xffffffa0            	// #-96
  402d24:	39009fe0 	strb	w0, [sp, #39]
  402d28:	14000010 	b	402d68 <str_to_hex+0x190>
  402d2c:	128009e0 	mov	w0, #0xffffffb0            	// #-80
  402d30:	39009fe0 	strb	w0, [sp, #39]
  402d34:	1400000d 	b	402d68 <str_to_hex+0x190>
  402d38:	128007e0 	mov	w0, #0xffffffc0            	// #-64
  402d3c:	39009fe0 	strb	w0, [sp, #39]
  402d40:	1400000a 	b	402d68 <str_to_hex+0x190>
  402d44:	128005e0 	mov	w0, #0xffffffd0            	// #-48
  402d48:	39009fe0 	strb	w0, [sp, #39]
  402d4c:	14000007 	b	402d68 <str_to_hex+0x190>
  402d50:	128003e0 	mov	w0, #0xffffffe0            	// #-32
  402d54:	39009fe0 	strb	w0, [sp, #39]
  402d58:	14000004 	b	402d68 <str_to_hex+0x190>
  402d5c:	128001e0 	mov	w0, #0xfffffff0            	// #-16
  402d60:	39009fe0 	strb	w0, [sp, #39]
  402d64:	d503201f 	nop
  402d68:	b9802fe0 	ldrsw	x0, [sp, #44]
  402d6c:	91000400 	add	x0, x0, #0x1
  402d70:	f9400be1 	ldr	x1, [sp, #16]
  402d74:	8b000020 	add	x0, x1, x0
  402d78:	39400000 	ldrb	w0, [x0]
  402d7c:	7100dc1f 	cmp	w0, #0x37
  402d80:	54000800 	b.eq	402e80 <str_to_hex+0x2a8>  // b.none
  402d84:	7100dc1f 	cmp	w0, #0x37
  402d88:	5400022c 	b.gt	402dcc <str_to_hex+0x1f4>
  402d8c:	7100cc1f 	cmp	w0, #0x33
  402d90:	54000560 	b.eq	402e3c <str_to_hex+0x264>  // b.none
  402d94:	7100cc1f 	cmp	w0, #0x33
  402d98:	5400010c 	b.gt	402db8 <str_to_hex+0x1e0>
  402d9c:	7100c41f 	cmp	w0, #0x31
  402da0:	540003e0 	b.eq	402e1c <str_to_hex+0x244>  // b.none
  402da4:	7100c41f 	cmp	w0, #0x31
  402da8:	5400042c 	b.gt	402e2c <str_to_hex+0x254>
  402dac:	7100c01f 	cmp	w0, #0x30
  402db0:	54000b80 	b.eq	402f20 <str_to_hex+0x348>  // b.none
  402db4:	1400005c 	b	402f24 <str_to_hex+0x34c>
  402db8:	7100d41f 	cmp	w0, #0x35
  402dbc:	54000500 	b.eq	402e5c <str_to_hex+0x284>  // b.none
  402dc0:	7100d41f 	cmp	w0, #0x35
  402dc4:	5400056c 	b.gt	402e70 <str_to_hex+0x298>
  402dc8:	14000021 	b	402e4c <str_to_hex+0x274>
  402dcc:	7101081f 	cmp	w0, #0x42
  402dd0:	540007c0 	b.eq	402ec8 <str_to_hex+0x2f0>  // b.none
  402dd4:	7101081f 	cmp	w0, #0x42
  402dd8:	5400010c 	b.gt	402df8 <str_to_hex+0x220>
  402ddc:	7100e41f 	cmp	w0, #0x39
  402de0:	54000600 	b.eq	402ea0 <str_to_hex+0x2c8>  // b.none
  402de4:	7100e41f 	cmp	w0, #0x39
  402de8:	5400054b 	b.lt	402e90 <str_to_hex+0x2b8>  // b.tstop
  402dec:	7101041f 	cmp	w0, #0x41
  402df0:	54000620 	b.eq	402eb4 <str_to_hex+0x2dc>  // b.none
  402df4:	1400004c 	b	402f24 <str_to_hex+0x34c>
  402df8:	7101101f 	cmp	w0, #0x44
  402dfc:	54000780 	b.eq	402eec <str_to_hex+0x314>  // b.none
  402e00:	7101101f 	cmp	w0, #0x44
  402e04:	540006cb 	b.lt	402edc <str_to_hex+0x304>  // b.tstop
  402e08:	7101141f 	cmp	w0, #0x45
  402e0c:	540007a0 	b.eq	402f00 <str_to_hex+0x328>  // b.none
  402e10:	7101181f 	cmp	w0, #0x46
  402e14:	540007e0 	b.eq	402f10 <str_to_hex+0x338>  // b.none
  402e18:	14000043 	b	402f24 <str_to_hex+0x34c>
  402e1c:	39409fe0 	ldrb	w0, [sp, #39]
  402e20:	32000000 	orr	w0, w0, #0x1
  402e24:	39009fe0 	strb	w0, [sp, #39]
  402e28:	1400003f 	b	402f24 <str_to_hex+0x34c>
  402e2c:	39409fe0 	ldrb	w0, [sp, #39]
  402e30:	321f0000 	orr	w0, w0, #0x2
  402e34:	39009fe0 	strb	w0, [sp, #39]
  402e38:	1400003b 	b	402f24 <str_to_hex+0x34c>
  402e3c:	39409fe0 	ldrb	w0, [sp, #39]
  402e40:	32000400 	orr	w0, w0, #0x3
  402e44:	39009fe0 	strb	w0, [sp, #39]
  402e48:	14000037 	b	402f24 <str_to_hex+0x34c>
  402e4c:	39409fe0 	ldrb	w0, [sp, #39]
  402e50:	321e0000 	orr	w0, w0, #0x4
  402e54:	39009fe0 	strb	w0, [sp, #39]
  402e58:	14000033 	b	402f24 <str_to_hex+0x34c>
  402e5c:	39409fe1 	ldrb	w1, [sp, #39]
  402e60:	528000a0 	mov	w0, #0x5                   	// #5
  402e64:	2a000020 	orr	w0, w1, w0
  402e68:	39009fe0 	strb	w0, [sp, #39]
  402e6c:	1400002e 	b	402f24 <str_to_hex+0x34c>
  402e70:	39409fe0 	ldrb	w0, [sp, #39]
  402e74:	321f0400 	orr	w0, w0, #0x6
  402e78:	39009fe0 	strb	w0, [sp, #39]
  402e7c:	1400002a 	b	402f24 <str_to_hex+0x34c>
  402e80:	39409fe0 	ldrb	w0, [sp, #39]
  402e84:	32000800 	orr	w0, w0, #0x7
  402e88:	39009fe0 	strb	w0, [sp, #39]
  402e8c:	14000026 	b	402f24 <str_to_hex+0x34c>
  402e90:	39409fe0 	ldrb	w0, [sp, #39]
  402e94:	321d0000 	orr	w0, w0, #0x8
  402e98:	39009fe0 	strb	w0, [sp, #39]
  402e9c:	14000022 	b	402f24 <str_to_hex+0x34c>
  402ea0:	39409fe1 	ldrb	w1, [sp, #39]
  402ea4:	52800120 	mov	w0, #0x9                   	// #9
  402ea8:	2a000020 	orr	w0, w1, w0
  402eac:	39009fe0 	strb	w0, [sp, #39]
  402eb0:	1400001d 	b	402f24 <str_to_hex+0x34c>
  402eb4:	39409fe1 	ldrb	w1, [sp, #39]
  402eb8:	52800140 	mov	w0, #0xa                   	// #10
  402ebc:	2a000020 	orr	w0, w1, w0
  402ec0:	39009fe0 	strb	w0, [sp, #39]
  402ec4:	14000018 	b	402f24 <str_to_hex+0x34c>
  402ec8:	39409fe1 	ldrb	w1, [sp, #39]
  402ecc:	52800160 	mov	w0, #0xb                   	// #11
  402ed0:	2a000020 	orr	w0, w1, w0
  402ed4:	39009fe0 	strb	w0, [sp, #39]
  402ed8:	14000013 	b	402f24 <str_to_hex+0x34c>
  402edc:	39409fe0 	ldrb	w0, [sp, #39]
  402ee0:	321e0400 	orr	w0, w0, #0xc
  402ee4:	39009fe0 	strb	w0, [sp, #39]
  402ee8:	1400000f 	b	402f24 <str_to_hex+0x34c>
  402eec:	39409fe1 	ldrb	w1, [sp, #39]
  402ef0:	528001a0 	mov	w0, #0xd                   	// #13
  402ef4:	2a000020 	orr	w0, w1, w0
  402ef8:	39009fe0 	strb	w0, [sp, #39]
  402efc:	1400000a 	b	402f24 <str_to_hex+0x34c>
  402f00:	39409fe0 	ldrb	w0, [sp, #39]
  402f04:	321f0800 	orr	w0, w0, #0xe
  402f08:	39009fe0 	strb	w0, [sp, #39]
  402f0c:	14000006 	b	402f24 <str_to_hex+0x34c>
  402f10:	39409fe0 	ldrb	w0, [sp, #39]
  402f14:	32000c00 	orr	w0, w0, #0xf
  402f18:	39009fe0 	strb	w0, [sp, #39]
  402f1c:	14000002 	b	402f24 <str_to_hex+0x34c>
  402f20:	d503201f 	nop
  402f24:	b9802be0 	ldrsw	x0, [sp, #40]
  402f28:	f9400fe1 	ldr	x1, [sp, #24]
  402f2c:	8b000020 	add	x0, x1, x0
  402f30:	39409fe1 	ldrb	w1, [sp, #39]
  402f34:	39000001 	strb	w1, [x0]
  402f38:	39009fff 	strb	wzr, [sp, #39]
  402f3c:	b9402fe0 	ldr	w0, [sp, #44]
  402f40:	11000800 	add	w0, w0, #0x2
  402f44:	b9002fe0 	str	w0, [sp, #44]
  402f48:	b9402be0 	ldr	w0, [sp, #40]
  402f4c:	11000400 	add	w0, w0, #0x1
  402f50:	b9002be0 	str	w0, [sp, #40]
  402f54:	b9402fe1 	ldr	w1, [sp, #44]
  402f58:	b9400fe0 	ldr	w0, [sp, #12]
  402f5c:	6b00003f 	cmp	w1, w0
  402f60:	54ffe4eb 	b.lt	402bfc <str_to_hex+0x24>  // b.tstop
  402f64:	d503201f 	nop
  402f68:	9100c3ff 	add	sp, sp, #0x30
  402f6c:	d65f03c0 	ret

0000000000402f70 <char_to_hex>:
  402f70:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  402f74:	910003fd 	mov	x29, sp
  402f78:	f9000bf3 	str	x19, [sp, #16]
  402f7c:	f90017a0 	str	x0, [x29, #40]
  402f80:	f90013a1 	str	x1, [x29, #32]
  402f84:	3900efbf 	strb	wzr, [x29, #59]
  402f88:	b90037bf 	str	wzr, [x29, #52]
  402f8c:	b9003fbf 	str	wzr, [x29, #60]
  402f90:	1400006a 	b	403138 <char_to_hex+0x1c8>
  402f94:	b9803fa0 	ldrsw	x0, [x29, #60]
  402f98:	f94013a1 	ldr	x1, [x29, #32]
  402f9c:	8b000020 	add	x0, x1, x0
  402fa0:	39400000 	ldrb	w0, [x0]
  402fa4:	7100bc1f 	cmp	w0, #0x2f
  402fa8:	54000209 	b.ls	402fe8 <char_to_hex+0x78>  // b.plast
  402fac:	b9803fa0 	ldrsw	x0, [x29, #60]
  402fb0:	f94013a1 	ldr	x1, [x29, #32]
  402fb4:	8b000020 	add	x0, x1, x0
  402fb8:	39400000 	ldrb	w0, [x0]
  402fbc:	7100e41f 	cmp	w0, #0x39
  402fc0:	54000148 	b.hi	402fe8 <char_to_hex+0x78>  // b.pmore
  402fc4:	b9803fa0 	ldrsw	x0, [x29, #60]
  402fc8:	f94013a1 	ldr	x1, [x29, #32]
  402fcc:	8b000020 	add	x0, x1, x0
  402fd0:	39400000 	ldrb	w0, [x0]
  402fd4:	5100c000 	sub	w0, w0, #0x30
  402fd8:	12001c00 	and	w0, w0, #0xff
  402fdc:	531c0c00 	ubfiz	w0, w0, #4, #4
  402fe0:	3900efa0 	strb	w0, [x29, #59]
  402fe4:	14000015 	b	403038 <char_to_hex+0xc8>
  402fe8:	b9803fa0 	ldrsw	x0, [x29, #60]
  402fec:	f94013a1 	ldr	x1, [x29, #32]
  402ff0:	8b000020 	add	x0, x1, x0
  402ff4:	39400000 	ldrb	w0, [x0]
  402ff8:	7101001f 	cmp	w0, #0x40
  402ffc:	540001e9 	b.ls	403038 <char_to_hex+0xc8>  // b.plast
  403000:	b9803fa0 	ldrsw	x0, [x29, #60]
  403004:	f94013a1 	ldr	x1, [x29, #32]
  403008:	8b000020 	add	x0, x1, x0
  40300c:	39400000 	ldrb	w0, [x0]
  403010:	7101181f 	cmp	w0, #0x46
  403014:	54000128 	b.hi	403038 <char_to_hex+0xc8>  // b.pmore
  403018:	b9803fa0 	ldrsw	x0, [x29, #60]
  40301c:	f94013a1 	ldr	x1, [x29, #32]
  403020:	8b000020 	add	x0, x1, x0
  403024:	39400000 	ldrb	w0, [x0]
  403028:	5100dc00 	sub	w0, w0, #0x37
  40302c:	12001c00 	and	w0, w0, #0xff
  403030:	531c0c00 	ubfiz	w0, w0, #4, #4
  403034:	3900efa0 	strb	w0, [x29, #59]
  403038:	b9803fa0 	ldrsw	x0, [x29, #60]
  40303c:	91000400 	add	x0, x0, #0x1
  403040:	f94013a1 	ldr	x1, [x29, #32]
  403044:	8b000020 	add	x0, x1, x0
  403048:	39400000 	ldrb	w0, [x0]
  40304c:	7100bc1f 	cmp	w0, #0x2f
  403050:	540002a9 	b.ls	4030a4 <char_to_hex+0x134>  // b.plast
  403054:	b9803fa0 	ldrsw	x0, [x29, #60]
  403058:	91000400 	add	x0, x0, #0x1
  40305c:	f94013a1 	ldr	x1, [x29, #32]
  403060:	8b000020 	add	x0, x1, x0
  403064:	39400000 	ldrb	w0, [x0]
  403068:	7100e41f 	cmp	w0, #0x39
  40306c:	540001c8 	b.hi	4030a4 <char_to_hex+0x134>  // b.pmore
  403070:	b9803fa0 	ldrsw	x0, [x29, #60]
  403074:	91000400 	add	x0, x0, #0x1
  403078:	f94013a1 	ldr	x1, [x29, #32]
  40307c:	8b000020 	add	x0, x1, x0
  403080:	39400000 	ldrb	w0, [x0]
  403084:	5100c000 	sub	w0, w0, #0x30
  403088:	12001c00 	and	w0, w0, #0xff
  40308c:	13001c01 	sxtb	w1, w0
  403090:	39c0efa0 	ldrsb	w0, [x29, #59]
  403094:	2a000020 	orr	w0, w1, w0
  403098:	13001c00 	sxtb	w0, w0
  40309c:	3900efa0 	strb	w0, [x29, #59]
  4030a0:	1400001b 	b	40310c <char_to_hex+0x19c>
  4030a4:	b9803fa0 	ldrsw	x0, [x29, #60]
  4030a8:	91000400 	add	x0, x0, #0x1
  4030ac:	f94013a1 	ldr	x1, [x29, #32]
  4030b0:	8b000020 	add	x0, x1, x0
  4030b4:	39400000 	ldrb	w0, [x0]
  4030b8:	7101001f 	cmp	w0, #0x40
  4030bc:	54000289 	b.ls	40310c <char_to_hex+0x19c>  // b.plast
  4030c0:	b9803fa0 	ldrsw	x0, [x29, #60]
  4030c4:	91000400 	add	x0, x0, #0x1
  4030c8:	f94013a1 	ldr	x1, [x29, #32]
  4030cc:	8b000020 	add	x0, x1, x0
  4030d0:	39400000 	ldrb	w0, [x0]
  4030d4:	7101181f 	cmp	w0, #0x46
  4030d8:	540001a8 	b.hi	40310c <char_to_hex+0x19c>  // b.pmore
  4030dc:	b9803fa0 	ldrsw	x0, [x29, #60]
  4030e0:	91000400 	add	x0, x0, #0x1
  4030e4:	f94013a1 	ldr	x1, [x29, #32]
  4030e8:	8b000020 	add	x0, x1, x0
  4030ec:	39400000 	ldrb	w0, [x0]
  4030f0:	5100dc00 	sub	w0, w0, #0x37
  4030f4:	12001c00 	and	w0, w0, #0xff
  4030f8:	13001c01 	sxtb	w1, w0
  4030fc:	39c0efa0 	ldrsb	w0, [x29, #59]
  403100:	2a000020 	orr	w0, w1, w0
  403104:	13001c00 	sxtb	w0, w0
  403108:	3900efa0 	strb	w0, [x29, #59]
  40310c:	b94037a0 	ldr	w0, [x29, #52]
  403110:	11000401 	add	w1, w0, #0x1
  403114:	b90037a1 	str	w1, [x29, #52]
  403118:	93407c00 	sxtw	x0, w0
  40311c:	f94017a1 	ldr	x1, [x29, #40]
  403120:	8b000020 	add	x0, x1, x0
  403124:	3940efa1 	ldrb	w1, [x29, #59]
  403128:	39000001 	strb	w1, [x0]
  40312c:	b9403fa0 	ldr	w0, [x29, #60]
  403130:	11000800 	add	w0, w0, #0x2
  403134:	b9003fa0 	str	w0, [x29, #60]
  403138:	b9803fb3 	ldrsw	x19, [x29, #60]
  40313c:	f94013a0 	ldr	x0, [x29, #32]
  403140:	97fff714 	bl	400d90 <strlen@plt>
  403144:	eb00027f 	cmp	x19, x0
  403148:	54fff263 	b.cc	402f94 <char_to_hex+0x24>  // b.lo, b.ul, b.last
  40314c:	d503201f 	nop
  403150:	f9400bf3 	ldr	x19, [sp, #16]
  403154:	a8c47bfd 	ldp	x29, x30, [sp], #64
  403158:	d65f03c0 	ret

000000000040315c <hex_to_char>:
  40315c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  403160:	910003fd 	mov	x29, sp
  403164:	f90017a0 	str	x0, [x29, #40]
  403168:	f90013a1 	str	x1, [x29, #32]
  40316c:	b9001fa2 	str	w2, [x29, #28]
  403170:	b9003fbf 	str	wzr, [x29, #60]
  403174:	b9003fbf 	str	wzr, [x29, #60]
  403178:	14000012 	b	4031c0 <hex_to_char+0x64>
  40317c:	b9803fa0 	ldrsw	x0, [x29, #60]
  403180:	f94013a1 	ldr	x1, [x29, #32]
  403184:	8b000020 	add	x0, x1, x0
  403188:	39400000 	ldrb	w0, [x0]
  40318c:	2a0003e1 	mov	w1, w0
  403190:	90000000 	adrp	x0, 403000 <char_to_hex+0x90>
  403194:	91344000 	add	x0, x0, #0xd10
  403198:	2a0103e2 	mov	w2, w1
  40319c:	aa0003e1 	mov	x1, x0
  4031a0:	f94017a0 	ldr	x0, [x29, #40]
  4031a4:	97fff707 	bl	400dc0 <sprintf@plt>
  4031a8:	f94017a0 	ldr	x0, [x29, #40]
  4031ac:	91000800 	add	x0, x0, #0x2
  4031b0:	f90017a0 	str	x0, [x29, #40]
  4031b4:	b9403fa0 	ldr	w0, [x29, #60]
  4031b8:	11000400 	add	w0, w0, #0x1
  4031bc:	b9003fa0 	str	w0, [x29, #60]
  4031c0:	b9403fa1 	ldr	w1, [x29, #60]
  4031c4:	b9401fa0 	ldr	w0, [x29, #28]
  4031c8:	6b00003f 	cmp	w1, w0
  4031cc:	54fffd8b 	b.lt	40317c <hex_to_char+0x20>  // b.tstop
  4031d0:	f94017a0 	ldr	x0, [x29, #40]
  4031d4:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4031d8:	d65f03c0 	ret

00000000004031dc <read_imu_tilt_thread>:
  4031dc:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4031e0:	910003fd 	mov	x29, sp
  4031e4:	f9000fa0 	str	x0, [x29, #24]
  4031e8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4031ec:	b9003fa0 	str	w0, [x29, #60]
  4031f0:	910083a0 	add	x0, x29, #0x20
  4031f4:	d2800202 	mov	x2, #0x10                  	// #16
  4031f8:	52800001 	mov	w1, #0x0                   	// #0
  4031fc:	97fff711 	bl	400e40 <memset@plt>
  403200:	90000000 	adrp	x0, 403000 <char_to_hex+0x90>
  403204:	91346000 	add	x0, x0, #0xd18
  403208:	52800002 	mov	w2, #0x0                   	// #0
  40320c:	52810001 	mov	w1, #0x800                 	// #2048
  403210:	97fff704 	bl	400e20 <open@plt>
  403214:	b9003ba0 	str	w0, [x29, #56]
  403218:	b9403ba0 	ldr	w0, [x29, #56]
  40321c:	3100041f 	cmn	w0, #0x1
  403220:	54000101 	b.ne	403240 <read_imu_tilt_thread+0x64>  // b.any
  403224:	90000000 	adrp	x0, 403000 <char_to_hex+0x90>
  403228:	91346001 	add	x1, x0, #0xd18
  40322c:	90000000 	adrp	x0, 403000 <char_to_hex+0x90>
  403230:	9134e000 	add	x0, x0, #0xd38
  403234:	97fff74f 	bl	400f70 <printf@plt>
  403238:	52800020 	mov	w0, #0x1                   	// #1
  40323c:	97fff6d9 	bl	400da0 <exit@plt>
  403240:	910083a0 	add	x0, x29, #0x20
  403244:	d2800202 	mov	x2, #0x10                  	// #16
  403248:	52800001 	mov	w1, #0x0                   	// #0
  40324c:	97fff6fd 	bl	400e40 <memset@plt>
  403250:	b9803fa1 	ldrsw	x1, [x29, #60]
  403254:	910083a0 	add	x0, x29, #0x20
  403258:	aa0103e2 	mov	x2, x1
  40325c:	aa0003e1 	mov	x1, x0
  403260:	b9403ba0 	ldr	w0, [x29, #56]
  403264:	97fff727 	bl	400f00 <read@plt>
  403268:	b90037a0 	str	w0, [x29, #52]
  40326c:	b94037a0 	ldr	w0, [x29, #52]
  403270:	3100041f 	cmn	w0, #0x1
  403274:	54000101 	b.ne	403294 <read_imu_tilt_thread+0xb8>  // b.any
  403278:	97fff746 	bl	400f90 <__errno_location@plt>
  40327c:	b9400000 	ldr	w0, [x0]
  403280:	71002c1f 	cmp	w0, #0xb
  403284:	54000081 	b.ne	403294 <read_imu_tilt_thread+0xb8>  // b.any
  403288:	90000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40328c:	91358000 	add	x0, x0, #0xd60
  403290:	97fff714 	bl	400ee0 <puts@plt>
  403294:	910083a1 	add	x1, x29, #0x20
  403298:	90000000 	adrp	x0, 403000 <char_to_hex+0x90>
  40329c:	9135e000 	add	x0, x0, #0xd78
  4032a0:	aa0103e2 	mov	x2, x1
  4032a4:	b94037a1 	ldr	w1, [x29, #52]
  4032a8:	97fff732 	bl	400f70 <printf@plt>
  4032ac:	b94037a0 	ldr	w0, [x29, #52]
  4032b0:	7100081f 	cmp	w0, #0x2
  4032b4:	540000cd 	b.le	4032cc <read_imu_tilt_thread+0xf0>
  4032b8:	b98037a2 	ldrsw	x2, [x29, #52]
  4032bc:	910083a1 	add	x1, x29, #0x20
  4032c0:	b00000a0 	adrp	x0, 418000 <pk+0x3660>
  4032c4:	912a8000 	add	x0, x0, #0xaa0
  4032c8:	97fff726 	bl	400f60 <strncpy@plt>
  4032cc:	5286a000 	mov	w0, #0x3500                	// #13568
  4032d0:	72a00180 	movk	w0, #0xc, lsl #16
  4032d4:	97fff71b 	bl	400f40 <usleep@plt>
  4032d8:	17ffffda 	b	403240 <read_imu_tilt_thread+0x64>
  4032dc:	00000000 	.inst	0x00000000 ; undefined

00000000004032e0 <__libc_csu_init>:
  4032e0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4032e4:	910003fd 	mov	x29, sp
  4032e8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4032ec:	90000094 	adrp	x20, 413000 <__FRAME_END__+0xf270>
  4032f0:	90000095 	adrp	x21, 413000 <__FRAME_END__+0xf270>
  4032f4:	91374294 	add	x20, x20, #0xdd0
  4032f8:	913722b5 	add	x21, x21, #0xdc8
  4032fc:	a902dff6 	stp	x22, x23, [sp, #40]
  403300:	cb150294 	sub	x20, x20, x21
  403304:	f9001ff8 	str	x24, [sp, #56]
  403308:	2a0003f6 	mov	w22, w0
  40330c:	aa0103f7 	mov	x23, x1
  403310:	9343fe94 	asr	x20, x20, #3
  403314:	aa0203f8 	mov	x24, x2
  403318:	97fff688 	bl	400d38 <_init>
  40331c:	b4000194 	cbz	x20, 40334c <__libc_csu_init+0x6c>
  403320:	f9000bb3 	str	x19, [x29, #16]
  403324:	d2800013 	mov	x19, #0x0                   	// #0
  403328:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40332c:	aa1803e2 	mov	x2, x24
  403330:	aa1703e1 	mov	x1, x23
  403334:	2a1603e0 	mov	w0, w22
  403338:	91000673 	add	x19, x19, #0x1
  40333c:	d63f0060 	blr	x3
  403340:	eb13029f 	cmp	x20, x19
  403344:	54ffff21 	b.ne	403328 <__libc_csu_init+0x48>  // b.any
  403348:	f9400bb3 	ldr	x19, [x29, #16]
  40334c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  403350:	a942dff6 	ldp	x22, x23, [sp, #40]
  403354:	f9401ff8 	ldr	x24, [sp, #56]
  403358:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40335c:	d65f03c0 	ret

0000000000403360 <__libc_csu_fini>:
  403360:	d65f03c0 	ret

Disassembly of section .fini:

0000000000403364 <_fini>:
  403364:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  403368:	910003fd 	mov	x29, sp
  40336c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  403370:	d65f03c0 	ret
